HEF4051B-Q100 データシートの表示（PDF） - NXP Semiconductors.

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HEF4051B-Q100

8-channel analog multiplexer/demultiplexer

NXP Semiconductors. 

Nexperia

HEF4051B-Q100

8-channel analog multiplexer/demultiplexer

6. Pinning information

6.1 Pinning

+()%4

< 

< 

=

< 

< 

(

9(( 

966 

 9''

 <

 <

 <

 <

 6

 6

 6

DDD

Fig 6. Pin configuration SOT109-1

+()%4

< 

< 

=

< 

< 

(

9(( 

966 

 9''

 <

 <

 <

 <

 6

 6

 6

DDD

Fig 7. Pin configuration SOT403-1

6.2 Pin description

Table 2. Pin description

Symbol

Pin

E

6

VEE

VSS

S1, S2, S3

7

8

11, 10, 9

Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4

Z

3

VDD

16

Description

enable input (active LOW)

supply voltage

ground supply voltage

select input

independent input or output

common output or input

supply voltage

HEF4051B_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 11 September 2014

© Nexperia B.V. 2017. All rights reserved

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