UPD4713AGT データシートの表示（PDF） - NEC => Renesas Technology

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UPD4713AGT

RS-232 LINE DRIVER/RECEIVER

NEC => Renesas Technology 

µPD4713A

BLOCK DIAGRAM/PIN CONFIGURATION (Top View)

+

C1

+10V

+

C3

1 VDD

2 C1+

3 VCC

+5V

4 C1–

Bypass

capasitor

Standby STBY 5

DIN1 6

TTL/CMOS

INPUT

DIN2 7

DIN3 8

TTL/CMOS

OUTPUT

ROUT1 9

ROUT2 10

ROUT3 11

12 GND

DC - DC

converter

C4+ 24

GND 23

C4– 22

+

C4

+

C2

VSS 21

–10V

300 Ω

300 Ω

300 Ω

20 DCON Output control

19 DOUT1

18 DOUT2

17 DOUT3

RS-232

OUTPUT

5 kΩ

5 kΩ

5 kΩ

16 RIN1

15 RIN2

14 RIN3

13 RCON

RS-232

INPUT

Threshold control

* VDD and Vss are output pins of voltages internally boosted. Connecting a load directly to these pins is not

recommended.

** The standby pin is internally pulled down.

*** Use capacitors with a working voltage of 16 V or higher as C1 through C4. Insert a bypass Capasitor about 0.1

to 1 µF between VCC pin to GND pin.

2

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