AD633 データシートの表示（PDF） - Analog Devices

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AD633

Low Cost Analog Multiplier

Analog Devices 

Data Sheet

FUNCTIONAL DESCRIPTION

The AD633 is a low cost multiplier comprising a translinear

core, a buried Zener reference, and a unity-gain connected

output amplifier with an accessible summing node. Figure 1

shows the functional block diagram. The differential X and Y

inputs are converted to differential currents by voltage-to-

current converters. The product of these currents is generated

by the multiplying core. A buried Zener reference provides an

overall scale factor of 10 V. The sum of (X × Y)/10 + Z is then

applied to the output amplifier. The amplifier summing node Z

allows the user to add two or more multiplier outputs, convert

the output voltage to a current, and configure various analog

computational functions.

Inspection of the block diagram shows the overall transfer

function is

(X1 − X2)(Y1 − Y2)

W=

+Z

(1)

10 V

AD633

ERROR SOURCES

Multiplier errors consist primarily of input and output offsets,

scale factor error, and nonlinearity in the multiplying core. The

input and output offsets can be eliminated by using the optional

trim of Figure 10. This scheme reduces the net error to scale

factor errors (gain error) and an irreducible nonlinearity

component in the multiplying core. The X and Y nonlinearities

are typically 0.4% and 0.1% of full scale, respectively. Scale

factor error is typically 0.25% of full scale. The high impedance

Z input should always reference the ground point of the driven

system, particularly if it is remote. Likewise, the differential X

and Y inputs should reference their respective grounds to

realize the full accuracy of the AD633.

+VS

50kΩ

300kΩ

±50mV

TO APPROPRIATE

INPUT TERMINAL

1kΩ (FOR EXAMPLE, X2, Y2, Z)

–VS

Figure 10. Optional Offset Trim Configuration

Rev. I | Page 7 of 16

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