PCD509X2 データシートの表示（PDF） - Philips Electronics

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PCD509X2

Low cost; low power DECT baseband controllers (ABC-PRO)

Philips Electronics 

Philips Semiconductors

Low cost; low power DECT baseband

controllers (ABC-PRO)

Objective specification

PCD509x2/zuu/v family

6 FUNCTIONAL DESCRIPTION

6.1 DECT baseband controller system

The PCD509x2 is a family of baseband controllers,

designed for use in Digital Enhanced Cordless

Telecommunications systems (DECT). The family is

designed for minimal component-count and minimal power

consumption for very long standby times. All baseband

controllers include an embedded 80C51 microcontroller

with on-chip memory, including an IrDA (Infrared Data

Association) compatible UART and I2C-bus. The Burst

Mode Logic performs the time-critical MAC layer functions

for applications in DECT handsets and base stations.

The implemented RF Interface is compatible with the

Philips Burst Mode Controller PCD504x. The ADPCM

transcoding is in compliance with the CCITT

Recommendation G.726. Also included is an on-chip

codec with receive and transmit filters, complying with

CCITT Recommendation G.712. Power-on-reset logic and

power management functions further reduce power

consumption and external components.

The chip is intended to support stand-alone systems only

(see Fig.3). There are no provisions to build clusters of

base stations. There are no provisions for external

controllers to exert control over the embedded 80C51.

There are no provisions for external controllers to have

direct access to the on-chip data memories. There are no

provisions to allow handsets to receive from two

unsynchronised base stations simultaneously, but a

handset can operate in a multi base station environment

as long as they are synchronous base stations.

Refer to the block diagram in Fig.1. The DECT Controller

consists of a number of functional blocks that operate

more or less autonomously and communicate with each

other via the System Data RAM (SDR). Blocks have

access to SDR via the Internal System Bus (ISB). The ISB

consists of an 8-bit data bus, a 10-bit address bus and a

number of bus-request/bus-grant signals. Access to the

ISB is controlled by ISB Bus Controller (IBC). The IBC

acknowledges bus requests on the basis of a priority

scheme. The embedded 80C51 controller is to be

programmed by the user. It must contain DECT software

from Man-Machine Interface (MMI) to the DECT protocols

TBC, CBC and DBC (refer to “Figures 10 to 13, in

Section 6 of prETS 300 175-3: June 1996”). Software is

available from Philips Semiconductors.

Hardware state machines in the Burst Mode Logic (BML)

and the Speech Interface (SPI) execute the lower blocks in

the TBC, CBC and DBC. The 80C51 has control over the

BML and the SPI via tables in SDR. The BML saves serial

data, received via R_DATAP/M, in buffer areas in SDR.

The position of the buffers in SDR is fixed by the 80C51

software by means of the tables previously mentioned.

A-fields and B-fields are stored in separate buffers. In this

way, two traffic bearers, each with their private A-fields,

can share the same B-field buffer as is required in case of

bearer hand-over or local call. The DSP and Codec

support speech processing functions like analog-to-digital

and digital-to-analog conversion, filtering, ADPCM

encoding and decoding, 8-bit µ-law PCM to 14-bit linear

PCM conversion and its reverse, echo cancelling, tone

generation etc.

handbook, full pagewidth

handbook, full pagewidth

RADIO

CIRCUITS

PCD50912

EARPIECE

MICROPHONE

a. Handset.

MGM860

RADIO

CIRCUITS

PCD50922

LINE

INTERFACE

(e.g. PCA1070)

b. Base station.

MGM859

a/b line

Fig.3 Block diagram examples of DECT systems with PCD509xy.

1998 Apr 27

10

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