CYUSB3013 データシートの表示（PDF） - Cypress Semiconductor
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CYUSB3013 Datasheet PDF : 54 Pages
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CYUSB301X/CYUSB201X
Clocking
FX3 allows either a crystal to be connected between the XTALIN
and XTALOUT pins or an external clock to be connected at the
CLKIN pin. The XTALIN, XTALOUT, CLKIN, and CLKIN_32 pins
can be left unconnected if they are not used.
Crystal frequency supported is 19.2 MHz, while the external
clock frequencies supported are 19.2, 26, 38.4, and 52 MHz.
FX3 has an on-chip oscillator circuit that uses an external
19.2-MHz (±100 ppm) crystal (when the crystal option is used).
An appropriate load capacitance is required with a crystal. Refer
to the specification of the crystal used to determine the appro-
priate load capacitance. The FSLC[2:0] pins must be configured
appropriately to select the crystal- or clock-frequency option. The
configuration options are shown in Table 3.
Table 4. FX3 Input Clock Specifications
Parameter
Phase noise
Maximum frequency deviation
Duty cycle
Overshoot
Undershoot
Rise time/fall time
Description
100-Hz offset
1-kHz offset
10-kHz offset
100-kHz offset
1-MHz offset
–
–
–
–
–
Clock inputs to FX3 must meet the phase noise and jitter require-
ments specified in Table 4 on page 10.
The input clock frequency is independent of the clock and data
rate of the FX3 core or any of the device interfaces. The internal
PLL applies the appropriate clock multiply option depending on
the input frequency.
Table 3. Crystal/Clock Frequency Selection
FSLC[2]
0
1
1
1
1
FSLC[1]
0
0
0
1
1
FSLC[0]
0
0
1
0
1
Crystal/Clock
Frequency
19.2-MHz crystal
19.2-MHz input CLK
26-MHz input CLK
38.4-MHz input CLK
52-MHz input CLK
Specification
Min
Max
–
–75
–
–104
–
–120
–
–128
–
–130
–
150
30
70
–
3
–
–3
–
3
Units
dB
ppm
%
ns
32-kHz Watchdog Timer Clock Input
FX3 includes a watchdog timer. The watchdog timer can be used to interrupt the ARM926EJ-S core, automatically wake up the FX3
in Standby mode, and reset the ARM926EJ-S core. The watchdog timer runs a 32-kHz clock, which may be optionally supplied from
an external source on a dedicated FX3 pin.
The firmware can disable the watchdog timer. Requirements for the optional 32-kHz clock input are listed in Table 5.
Table 5. 32-kHz Clock Input Requirements
Parameter
Min
Max
Duty cycle
Frequency deviation
Rise time/fall time
40
60
–
±200
–
200
Units
%
ppm
ns
Document Number: 001-52136 Rev. *U
Page 10 of 54
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