LNK6407 データシートの表示（PDF） - Unspecified

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LNK6407

Energy-Efficient, Accurate Primary-Side Regulation CV/CC Switcher for Adapters and Chargers

Unspecified 

LNK64x4-64x8

Figure 5. PCB (Bottom Layer on Left) (Top Layer on Right) Layout Example Showing 10 W Design using K Package.

minimize the high frequency ringing will give the best regulation.

Figure 6 shows the desired drain voltage waveform compared to

Figure 7 with a large undershoot due to the leakage inductance

induced ring. This will reduce the output voltage regulation

performance. To reduce this adjust the value of the resistor in series

with the clamp diode.

Addition of a Bias Circuit for Higher Light Load

Efficiency and Lower No-load Input Power

Consumption

The addition of a bias circuit can decrease the no-load input power

from ~200 mW down to less than 30 mW at 230 VAC input. Light

load efficiency also increases which may avoid the need to use a

Schottky barrier vs. PN junction output diode while still meeting

average efficiency requirements.

The power supply schematic shown in Figure 4 has only one winding

for both feedback and bias circuit. Diode D3, C8, R5 and R8 form the

bias circuit. The feedback winding voltage is designed at 11 V, this

provides a high enough voltage to supply the BYPASS pin even during

low switching frequency operation at no-load.

A 10 mF capacitance value is recommended for C8 to hold up the bias

voltage at the low switching frequencies that occur at light to

no-load. The capacitor type is not critical but the voltage rating

should be above the maximum value of VBIAS. The recommended

current into the BYPASS pin is equal to IC supply current (0.6 mA to

0.7 mA) at the minimum bias winding voltage. The BYPASS pin

current should not exceed 10 mA at the maximum bias winding

voltage. The value of R8 is calculated according to (VBIAS – VBP)/IS2,

where VBIAS (10 V typ.) is the voltage across C8, IS2 (0.6 mA to

0.7 mA typ.) is the IC supply current and VBP (6.2 V typ.) is the

BYPASS pin voltage. The parameters IS2 and VBP are provided in the

parameter table of the LinkSwitch-3 data sheet. Diode D3 can be any

low cost diode such as FR102, 1N4148 or BAV19/20/21.

Quick Design Checklist

As with any power supply design, all LinkSwitch-3 designs should be

verified on the bench to make sure that component specifications are

not exceeded under worst-case conditions.

The following minimum set of tests is strongly recommended:

1. Maximum drain voltage – Verify that peak VDS does not exceed

680 V at the highest input voltage and maximum output power.

2. Maximum drain current – At maximum ambient temperature,

maximum input voltage and maximum output load, verify drain

current waveforms at start-up for any signs of transformer

saturation and excessive leading edge current spikes.

LinkSwitch-3 has a leading edge blanking time of 170 ns to

prevent premature termination of the ON-cycle.

3. Thermal check – At maximum output power, both minimum and

maximum input voltage and maximum ambient temperature;

verify that temperature specifications are not exceeded for

LinkSwitch-3, transformer, output diodes and output capacitors.

Enough thermal margin should be allowed for part-to-part variation

of the RDS(ON) of LinkSwitch-3, as specified in the data sheet.

Design Tools

Up-to-date information on design tools can be found at the Power

Integrations web site: www.power.com

6

Rev. C 03/16

www.power.com

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