Q67060-S6307-A6 データシートの表示（PDF） - Infineon Technologies

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Q67060-S6307-A6

Smart Sense High-Side Power Switch

Infineon Technologies 

Pin

1

2

3

4

5

6&7

Symbol

ST

GND

IN

Vbb

IS

OUT

(Load, L)

BTS 640 S2

Function

Diagnostic feedback: open drain, invers to input level

Logic ground

Input, activates the power switch in case of logical high signal

Positive power supply voltage, the tab is shorted to this pin

Sense current output, proportional to the load current, zero in

the case of current limitation of load current

Output, protected high-side power output to the load.

Both output pins have to be connected in parallel for operation

according this spec (e.g. kILIS).

Design the wiring for the max. short circuit current

Maximum Ratings at Tj = 25 °C unless otherwise specified

Parameter

Symbol

Supply voltage (overvoltage protection see page 4)

Vbb

Supply voltage for full short circuit protection

Tj Start=-40 ...+150°C

Load dump protection1) VLoadDump = VA + Vs, VA = 13.5V

RI2)= 2 Ω, RL= 1 Ω, td= 200 ms, IN= low or high

Vbb

VLoad dump3)

Load current (Short circuit current, see page 5)

IL

Operating temperature range

Tj

Storage temperature range

Tstg

Power dissipation (DC), TC ≤ 25 °C

Ptot

Inductive load switch-off energy dissipation, single pulse

Vbb = 12V, Tj,start = 150°C, TC = 150°C const.

IL = 12.6 A, ZL = 4,2 mH, 0 Ω: EAS

IL = 4 A, ZL = 330 mH, 0 Ω: EAS

Electrostatic discharge capability (ESD)

(Human Body Model)

IN: VESD

ST, IS:

out to all other pins shorted:

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5kΩ; C=100pF

Input voltage (DC)

VIN

Current through input pin (DC)

IIN

Current through status pin (DC)

IST

Current through current sense pin (DC)

IIS

see internal circuit diagrams page 8

Values Unit

43 V

34 V

60 V

self-limited A

-40 ...+150 °C

-55 ...+150

85 W

0,41

J

3,5

1.0 kV

4.0

8.0

-10 ... +16 V

±2.0 mA

±5.0

±14

1) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω

resistor in the GND connection is recommended).

2) RI = internal resistance of the load dump test pulse generator

3) VLoad dump is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839

Semiconductor Group

Page 2

2003-Oct-01

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