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Q67060-S6307-A6 データシートの表示(PDF) - Infineon Technologies

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Q67060-S6307-A6
Infineon
Infineon Technologies Infineon
Q67060-S6307-A6 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
BTS 640 S2
Truth Table
Normal
operation
Current-
limitation
Short circuit to
GND
Over-
temperature
Short circuit to
Vbb
Open load
Undervoltage
Overvoltage
Negative output
voltage clamp
L = "Low" Level
H = "High" Level
Input Output
level
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
level
L
H
L
H
L
L16)
L
L
H
H
L19)
H
L
L
L
L
L
Status
level
H
L
H
H
H
H
H
H
L17)
L
H (L20))
L
H
L
H
L
H
Current
Sense
IIS
0
nominal
0
0
0
0
0
0
0
<nominal 18)
0
0
0
0
0
0
0
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
16) The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is
zero
17) An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
18) Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.
19) Power Transistor off, high impedance
20) with external resistor between pin 4 and pin 6&7
Semiconductor Group
Page 7
2003-Oct-01

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