HV9963 データシートの表示（PDF） - Supertex Inc
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HV9963 Datasheet PDF : 12 Pages
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HV9963
Power Topology
The HV9963 is a switch-mode LED driver designed to con-
trol a buck, boost or SEPIC converter in a constant frequen-
cy mode. The IC includes internal linear regulators, which
enables it to operate at input voltages from 9 to 40V. The IC
includes features typically required in LED drivers like open
LED protection, output short circuit protection, linear and
PWM dimming and accurate control of the LED current. It
also includes logic to enable enhanced PWM dimming which
allows dimming ratios in excess of 5000:1.
Power Supply to the IC (VIN, PVDD and AVDD)
The HV9963 can be powered directly from its VIN pin that
takes a voltage up to 40V. There are two linear regulators
within the HV9963 – a 10V linear regulator (PVDD), which
is used for the two FET drivers, and a 5.0V linear regulator
(AVDD) which supplies power to the rest of the control logic.
The IC also has a built in under-voltage lockout which shuts
off the IC if the voltage at either VDD pin falls below its UVLO
threshold.
Both VDD pins must by bypassed by a low ESR capacitor (≥
0.1µF) for proper operation.
The input current drawn from the external power supply (or
VIN pin) is a sum of the 1.5mA (max) current drawn by the all
the internal circuitry and the current drawn by the gate driver
(which in turn depends on the switching frequency and the
gate charge of the external FET).
The oscillator is also timed to the PWM dimming signal to
improve the PWM dimming performance. The oscillator is
turned off when PWMD is low and is enabled when PWMD
goes high.
Current Sense (CS)
The current sense input is used to sense the source current
of the switching FET. The CS input of the HV9963 includes
a built in 100ns (minimum) blanking time to prevent spurious
turn off due to the initial current spike when the FET turns
on.
The IC includes an internal resistor divider network, which
steps down the voltage at the COMP pins by a factor of 12
(11R:1R). This voltage is used as the reference for the cur-
rent sense comparators. Since the maximum voltage of the
COMP pin is AVDD - 0.7V, this voltage determines the maxi-
mum reference current for the current sense comparator and
thus the maximum inductor current.
The current sense resistor RCS should be chosen so that the
input inductor current is limited to below the saturation cur-
rent level of the input inductor. For discontinuous conduction
mode of operation, no slope compensation is necessary. In
this case, the current sense resistor is chosen as:
RCS =
AVDD - 0.7V
12 • ISAT
IIN = 1.5mA + Qg1 • fS + Qg2 • fPWMD
where ISAT is the maximum desired peak inductor current.
In the above equation, fs is the switching frequency of the
converter, fPWMD is the frequency of the applied PWM dim-
ming signal, Qg1 is the gate charge of the external boost FET
and Qg2 is the gate charge of the disconnect FET (both of
which can be obtained from the FET datasheets).
The AVDD pin can also be used as a reference voltage to set
the LED current using a resistor divider to the IREF pin.
Timing Resistor (RT)
The switching frequency of the converter is set by connect-
ing a resistor between RT and GND. The resistor value can
be determined as:
RT ≈
1
43pF • fS
- 322Ω
For continuous conduction mode converters operating in the
constant frequency mode, slope compensation becomes
necessary to ensure stability of the peak current mode con-
troller, if the operating duty cycle is greater than 0.5. This
factor must also be accounted for when determining RCS
(see Slope Compensation section).
Slope Compensation
Choosing a slope compensation that is one half of the down
slope of the inductor current ensures that the converter will
be stable for all duty cycles.
Slope compensation in the HV9963 can be programmed by
one external capacitor in series with the CS pin (see Fig-
ure 1). A current, proportional to the switching frequency, is
sourced out of the CS pin.
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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