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HV9963 データシートの表示(PDF) - Supertex Inc

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HV9963 Datasheet PDF : 12 Pages
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HV9963
equal distribution between the rise and fall times, a 10nH
parasitic inductance causes a pre-charge voltage of:
VPRE-CHARGE
=
10nH
3A
50ns
=
600mV
As can be seen, a very conservative estimate of the pre-
charge voltage is already larger than the steady state peak
current sense voltage and will cause the converter to falsely
trip.
To prevent this behavior, a resistor (typically 500 – 800Ω)
can be added in series with the capacitor as shown in Figure
4. This resistor limits the charging current into the capacitor.
However, the resistor will also slow down the discharge of
the capacitor during the FET off time, so the maximum exter-
nal resistance will be limited by the switching frequency and
the slope compensation capacitor.
AVDD
GATE
Q1
-
ISC
+
GATE
Q2
GND
RT
CS
CSC
CDRAIN
REXT
RCS
- VLP +
+
VDRAIN
-
LP
ILP
Figure 4: Modified Slope compensation circuit
Rext,max =
1 0.07
3 fS
1
CSC
- 600
FLT Output
The FLT pin is used to drive a disconnect FET when driving
boost and SEPIC converters. In the case of boost convert-
ers, when there is a short circuit fault at the output, there is a
direct path from the input source to ground which can cause
high currents to flow. The disconnect switch is used to inter-
rupt this path and prevent damage to the converter.
The disconnect switch also helps to disconnect the output
filter capacitors for the boost and SEPIC converters from
the LED load during PWM dimming and enables a very high
PWM dimming ratio.
Control of the LED Current (IREF, FDBK and
COMP)
The LED current in the HV9963 is controlled in a closed-
loop manner. The current reference which sets the three
LED currents at the IREF pin is set by using a resistor di-
vider from the AVDD pin (or can be set externally with a low
voltage source). This reference voltage is compared to the
voltage at the FDBK pin which senses the LED current by
using current sense resistors. HV9963 includes a 1.0MHz
transconductance amplifier with tri-state output, which is
used to close the feedback loops and provide accurate cur-
rent control. The compensation network is connected at the
COMP pin.
The output of the op-amp is buffered and connected to the
current sense comparator using a 11R:1R resistor divider.
The output of the op-amp is also controlled by the signal
applied to the PWMD pin. When PWMD is high, the output
of the op-amp is connected to the COMP pin. When PWMD
is low, the output is left open. This enables the integrating
capacitor to hold the charge when the PWMD signal has
turned off the gate drive. When the IC is enabled, the volt-
age on the integrating capacitor will force the converter into
a steady state almost instantaneously.
Note: The absolute maximum voltage rating of the IREF pin
is 3.5V and the voltage applied at this pin should not exceed
this rating.
Soft Start (SS)
Soft start of the LED current can be achieved by connecting
a capacitor at the SS pin. The rate of rise of SS pin limits the
LED current’s rate of rise.
Upon start-up, the capacitance at the COMP network
is being charged by the 200μA sourcing current of the
transconductance amplifier. Without the soft-start func-
tion, this larger current would cause the COMP voltage to
increase faster than the boost converter’s response time,
causing overshoots in the LED current during start-up.
The SS pin is used to prevent these LED current overshoots
by limiting the COMP pin’s rate of rise . A capacitor at the soft
start pin programs the voltage’s rate of rise at the pin. The
SS pin holds the COMP pin to 1.0V above the SS pin and
thereby controls the COMP pin’s rate of rise. The COMP pin
is released once the voltage reaches its steady state volt-
age.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
8

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