C8051F120DK データシートの表示（PDF） - Silicon Laboratories
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C8051F120DK Datasheet PDF : 13 Pages
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C8051F12x-DK
6. Target Board
The C8051F12x Development Kit includes a target board with a C8051F120 device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to Figure 2 for the locations of the various I/O connectors.
P1
Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
J1
Connects SW2 to P3.7 pin
J3
Connects LED D3 to P1.6 pin
J4
JTAG connector for Debug Adapter interface
J5
DB-9 connector for UART0 RS232 interface
J6
Connector for UART0 TX (P0.0)
J8
Connector for UART0 RTS (P4.0)
J9
Connector for UART0 RX (P0.1)
J10
Connector for UART0 CTS (P4.1)
J11
Analog loopback connector
J12–J19 Port 0–7 connectors
J20
Analog I/O terminal block
J22
VREF connector
J23
VDD Monitor Disable
J24
96-pin Expansion I/O connector
J5
J24
Port 5
Port 6
Port 3
Port 4
Pin 2
Pin 1
Port 7
Port 1
J10J8 J6 J9
Port 0
C8051
F12X
Port 2 J3
Pin 1 J23
P1.6
J1
Pin 2
J11
Pin 1
J20
J22
Pin 1
J4
Pin 2
P1
PWR
Pin 1
Figure 2. C8051F120 Target Board
Pin 1
Rev. 0.7
5
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