AD1856RZ-REEL7 データシートの表示（PDF） - Analog Devices

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AD1856RZ-REEL7

16-Bit PCM Audio DAC

Analog Devices 

Data Sheet

AD1856

ANALOG CIRCUIT CONSIDERATIONS

GROUNDING RECOMMENDATIONS

The AD1856 has two ground pins, designated analog and digital

ground (AGND and DGND). The analog ground pin is the high

quality ground reference point for the analog portion of the

device. The digital ground pin returns ground current from the

digital logic portions of the AD1856 circuitry. Both pins should

be connected directly to a single solid ground plane, and the

components should be placed around the AD1856 so that analog

and digital return currents do not cross each other. A single solid

ground plane with good parts placement and trace routing yields

the quietest design with the best signal integrity and EMI/EMC

specifications.

POWER SUPPLIES AND DECOUPLING

The AD1856 has four power supply input pins. +VS and −VS

provide the supply voltages to operate the linear portions of the

DAC, including the voltage reference, output amplifier, and

control amplifier. The +VS and −VS supplies are designed to

operate from ±5 V to ±12 V.

The +VL and −VL pins supply power to the digital portions of

the chip, including the input shift register and the input latching

circuitry. The +VL and −VL supplies are also designed to operate

from ±5 V to ±12 V, subject only to the limitation that +VL cannot

be more positive than +VS, and −VL cannot be more negative

than −VS.

Decoupling capacitors should be used on all power supply pins.

Furthermore, good engineering practice suggests that these

capacitors be placed as close as possible to the package pins. The

decoupling for both the bipolar logic supply, ±VL, and the bipolar

analog supply, ±VS, should be returned to the closest ground pins.

The use of four separate power supplies reduces feedthrough

from the digital portion of the system to the linear portions of

the system, thus contributing to good performance. However,

four separate voltage supplies are not necessary for good circuit

performance. For example, Figure 3 illustrates a system where

only a single positive and a single negative supply are available.

+5V

+VL

3

+VS

16

AD1856

2

8

1

DGND

–VL –VS

12

AGND

GROUND

–5V

Figure 3. Alternate Recommended Schematic

Given that these two supplies are within the range of ±5 V to

±12 V, they can be used to power the AD1856. In this case, the

positive logic and positive analog supplies can both be connected

to the single positive supply. The negative logic and negative analog

supplies can both be connected to the single negative supply.

Performance benefits from a measure of isolation between the

supplies, introduced by using simple low-pass filters in the

individual power supply leads.

As with most linear circuits, changes in the power supplies affect

the output of the DAC. Analog Devices recommends that well-

regulated power supplies with less than 1% ripple be incorporated

into the design of any system using these devices.

TOTAL HARMONIC DISTORTION

The THD figure of an audio DAC represents the amount of

undesirable signal produced during reconstruction and play-

back of an audio waveform. The THD specification, therefore,

provides a direct method for classifying and choosing an audio

DAC for a desired level of performance.

Analog Devices tests and grades all AD1856 devices on the

basis of THD performance. A block diagram of the test setup

is shown in Figure 4. In this test setup, a digital data stream,

representing a 0 dB, −20 dB, or −60 dB sine wave, is sent to the

device under test. The frequency of this waveform is 990.5 Hz.

Input data is sent to the AD1856 at a 4× fS rate (176.4 kHz). The

AD1856 under test produces an analog output signal with the

on-board op amp.

16-BIT

DIGITAL

WAVEFORM

GENERATOR

OUTPUT

4× fS

DATA

RATE

AD1856

DATA

LE

VOUT

CLK

23 CYCLES

010

111

110

4096 PT. . . .

FFT

...

ANALYZER . . .

110

101

001

001

110

101

...

. . . DIGITIZER

...

010

011

110

±3V

990.5Hz

NOTCH

FILTER

4096

SAMPLES

Figure 4. Block Diagram of Distortion Test Circuit

Rev. C | Page 9 of 16

30kHz

LOW-PASS

FILTER

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