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DS2430AP データシートの表示(PDF) - Maxim Integrated

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コンポーネント説明
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DS2430AP
MaximIC
Maxim Integrated MaximIC
DS2430AP Datasheet PDF : 19 Pages
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Transaction Sequence
The sequence for accessing the DS2430A via the 1-Wire port is as follows:
DS2430A
Initialization
ROM Function Command
S Memory Function Command
N Transaction/Data
IG INITIALIZATION
S All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
E consists of a Reset Pulse transmitted by the bus master followed by a Presence Pulse(s) transmitted by the
D slave(s).
The Presence Pulse lets the bus master know that the DS2430A is on the bus and is ready to operate. For
W more details, see the 1-Wire Signaling section.
E ROM FUNCTION COMMANDS
N Once the bus master has detected a presence pulse, it can issue one of the four ROM function commands.
All ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in
R Figure 8):
O Read ROM [33h]
F This command allows the bus master to read the DS2430A’s 8-bit family code, 48-bit serial number, and
8-bit CRC. This command can be used only if there is a single DS2430A on the bus. If more than one
D slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time
E (open drain produces a wired-AND result). The resultant family code and 48-bit serial number usually
result in a mismatch of the CRC.
ND Match ROM [55h]
E The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a
specific DS2430A on a multidrop bus. Only the DS2430A that exactly matches the 64-bit ROM sequence
M will respond to the subsequent memory function command. All slaves that do not match the 64-bit ROM
sequence will wait for a Reset Pulse. This command can be used with a single or multiple devices on the
M bus.
O Skip ROM [CCh]
C This command can save time in a single-drop bus system by allowing the bus master to access the
E memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus
and a read command is issued following the Skip ROM command, data collision will occur on the bus as
R multiple slaves transmit simultaneously (open drain pulldowns produces a wired-AND result).
T Search ROM [F0h]
OWhen a system is initially brought up, the bus master might not know the number of devices on the 1-
NWire bus or their 64-bit ROM codes. The Search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The Search ROM process
is the repetition of a simple, three-step routine: read a bit, read the complement of the bit, then write the
desired value of that bit. The bus master performs this simple, three-step routine on each bit of the ROM.
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