STLC90115 データシートの表示（PDF） - STMicroelectronics

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STLC90115

ZipperWire™ VDSL DMT Chip Set

STMicroelectronics 

STLC90114 - STLC90115

Transmit path

STLC90115 functions in the transmit direction:

– Utopia level 1 & 2 interface (& SLAP interface)

– Cell specific functions

– Reed Solomon encoding + interleaving

– Mapping a digital bit stream on DMT carriers

– Rotor and Frequency domain gain correction;

– Spectral Shaping

– Frequency to Time domain conversion with IFFT,

– Time Domain DMT symbol composing and filtering;

– Transmit Windowing

– Interpolation of the TX signal programmable from a 17.664 MHz towards 35.328 MHz.

Control of Transceiver Chip Operations:

The STLC90115 runs the firmware controlling the operations of the VDSL transceiver (AFE, DMT modem,

Framer). During modem initialization, the controller computes and sets up parameters for all programma-

ble DMT functions, filters and equalizers. The controller is able to run in different rate-adaptive modes as

defined by the operator and can run programs for the VTU-O (master mode) or for the VTU-R (slave-

mode) sides. The controller also implements the EOC and VOC protocols. During operation, the

STLC90115 performs continuous line monitoring and initiates consecutive actions as specified by the op-

erator (e.g. bit swapping, dynamic bit-rate adaptation...). It also collects performance and error information

for use by management entities.

Interface to Management Entities

The STLC90115 also runs the communication protocol to interface with external management entities. A

specific VDSL modem control interface is available to ease the integration with both systems HW and FW.

This "CTRLE communication channel" is used to transfer information and commands between modem

and management entities. The STLC90115 provides direct HW connection to external components (pro-

cessors, SARs, Muxes,...) through an 8-bit parallel bus for the control path. An API for the external man-

agement function is provided or the Operation and Maintenance of the VDSL chipset. This API

significantly reduces the software design in cycle. The following simplified VDSL LIM/CPE software refer-

ence model is used to describe the external SW interfaces of the VDSL Modem.

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