KSZ8893FQLI-FX データシートの表示（PDF） - Micrel

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KSZ8893FQLI-FX

Single-Chip 3-Port Switch with Fiber Support

Micrel 

Micrel, Inc.

KSZ8893FQL

Features

Integrated 3-Port 10/100 Ethernet Switch

• Three MACs and two PHYs fully compliant with IEEE

802.3u standard

• Non-blocking switch fabric assures fast packet

delivery by utilizing an 1K MAC address lookup table

and a store-and-forward architecture

• Full duplex IEEE 802.3x flow control (PAUSE) with

force mode option

• Half-duplex back pressure flow control

• HP Auto MDI-X for reliable detection of and correction

for straight-through and crossover cables with disable

and enable option

• Micrel LinkMD® TDR-based cable diagnostics permit

identification of faulty copper cabling

• 100Base-FX, 100Base-SX and 10Base-FL fiber

support on port 1

• MII interface supports both MAC mode and PHY mode

• RMII interface support with external 50MHz system

clock

• 7-wire serial network interface (SNI) support for legacy

MAC

• Comprehensive LED Indicator support for link, activity,

full/half duplex and 10/100 speed

Fiber Support

• Integrated LED driver and post amplifier for 10Base-

FL and 100Base-SX optical modules

TTC TS-1000 OAM

• Supports OAM sub-layer which conforms to TS-1000

V2 specification from TTC (Telecommunication

Technology Committee)

• Sends and receives OAM frames to Center or

Terminal side

• Loop back mode to support loop back packet from

Center side to Terminal side

• Far-end fault detection with disable and enable

• Link Transparency to indicate link down from link

partner

• Unique User Defined Register (UDR) feature brings

OAM to low cost/complexity nodes

Comprehensive Configuration Register Access

• SMI, SPI and I2C management interfaces to all 8-bit

internal registers

• MII management (MIIM) interface to PHY registers

• I/O pins strapping and EEPROM to program selective

registers in unmanaged switch mode

• Control registers configurable on the fly (port-priority,

802.1p/d/q, AN…)

QoS/CoS Packet Prioritization Support

• Per port, 802.1p and DiffServ-based

• Re-mapping of 802.1p priority field per port basis

• Four priority levels

Advanced Switch Features

• IEEE 802.1q VLAN support for up to 16 groups (full-

range of VLAN IDs)

• VLAN ID tag/untag options, per port basis

• IEEE 802.1p/q tag insertion or removal on a per port

basis (egress)

• Programmable rate limiting at the ingress and egress

on a per port basis

• Broadcast storm protection with % control (global and

per port basis)

• IEEE 802.1d spanning tree protocol support

• Special tagging mode to inform the processor which

ingress port receives the packet

• IGMP snooping (Ipv4) and MLD snooping (Ipv6)

support for multicast packet filtering

• MAC filtering function to forward unknown unicast

packets to specified port

• Double-tagging support

Low Latency Support

• Repeater mode

Switch Monitoring Features

• Port mirroring/monitoring/sniffing: ingress and/or

egress traffic to any port or MII

• MIB counters for fully compliant statistics gathering, 34

MIB counters per port

• Loopback modes for remote diagnostic of failure

Low Power Dissipation

• Full-chip hardware power-down (register configuration

not saved)

• Per port based software power-save on PHY (idle link

detection, register configuration preserved)

• Voltages:

– Core 1.2V

– I/O and Transceiver 3.3V

Available in 128-Pin PQFP, Lead-free package

October 2007

2

M9999-101607-1.3

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