BD82B65 データシートの表示（PDF） - Intel
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コンポーネント説明
メーカー
BD82B65 Datasheet PDF : 934 Pages
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5.22
5.23
5.24
5.25
5.26
5.27
5.21.3.2 I2C Write Commands to the Intel® ME .................................. 242
5.21.3.3 Block Read Command ......................................................... 242
5.21.3.4 Read Data Format .............................................................. 244
5.21.3.5 Thermal Data Update Rate .................................................. 244
5.21.3.6 Temperature Comparator and Alert ...................................... 244
5.21.3.7 BIOS Set Up ...................................................................... 246
5.21.3.8 SMBus Rules ..................................................................... 246
5.21.3.9 Case for Considerations ...................................................... 247
Intel® High Definition Audio Overview (D27:F0)................................................... 249
5.22.1 Intel® High Definition Audio Docking (Mobile Only) ................................ 249
5.22.1.1 Dock Sequence .................................................................. 249
5.22.1.2 Exiting D3/CRST# When Docked .......................................... 250
5.22.1.3 Cold Boot/Resume from S3 When Docked.............................. 251
5.22.1.4 Undock Sequence............................................................... 251
5.22.1.5 Normal Undock .................................................................. 251
5.22.1.6 Surprise Undock ................................................................ 252
5.22.1.7 Interaction between Dock/Undock and Power Management
States .............................................................................. 252
5.22.1.8 Relationship between HDA_DOCK_RST# and HDA_RST#......... 252
Intel® ME and Intel® ME Firmware 7.0 ............................................................... 253
5.23.1 Intel® ME Requirements..................................................................... 254
Serial Peripheral Interface (SPI) ........................................................................ 255
5.24.1 SPI Supported Feature Overview ......................................................... 255
5.24.1.1 Non-Descriptor Mode .......................................................... 255
5.24.1.2 Descriptor Mode................................................................. 255
5.24.2 Flash Descriptor ................................................................................ 256
5.24.2.1 Descriptor Master Region .................................................... 258
5.24.3 Flash Access ..................................................................................... 259
5.24.3.1 Direct Access Security ........................................................ 259
5.24.3.2 Register Access Security ..................................................... 259
5.24.4 Serial Flash Device Compatibility Requirements ..................................... 260
5.24.4.1 PCH SPI-Based BIOS Requirements ...................................... 260
5.24.4.2 Integrated LAN Firmware SPI Flash Requirements .................. 260
5.24.4.3 Intel® Management Engine Firmware SPI Flash Requirements.. 261
5.24.4.4 Hardware Sequencing Requirements..................................... 261
5.24.5 Multiple Page Write Usage Model ......................................................... 262
5.24.5.1 Soft Flash Protection........................................................... 263
5.24.5.2 BIOS Range Write Protection ............................................... 263
5.24.5.3 SMI# Based Global Write Protection ..................................... 263
5.24.6 Flash Device Configurations ................................................................ 263
5.24.7 SPI Flash Device Recommended Pinout ................................................ 264
5.24.8 Serial Flash Device Package ................................................................ 264
5.24.8.1 Common Footprint Usage Model ........................................... 264
5.24.8.2 Serial Flash Device Package Recommendations ...................... 265
5.24.9 PWM Outputs (Server/Workstation Only) .............................................. 265
5.24.10 TACH Inputs (Server/Workstation Only) ............................................... 265
Feature Capability Mechanism ........................................................................... 265
PCH Display Interfaces and Intel® Flexible Display Interconnect............................. 266
5.26.1 Analog Display Interface Characteristics ............................................... 266
5.26.1.1 Integrated RAMDAC............................................................ 267
5.26.1.2 DDC (Display Data Channel) ................................................ 267
5.26.2 Digital Display Interfaces.................................................................... 267
5.26.2.1 LVDS (Mobile only)............................................................. 267
5.26.2.2 High Definition Multimedia Interface ..................................... 270
5.26.2.3 Digital Video Interface (DVI)................................................ 271
5.26.2.4 DisplayPort*...................................................................... 271
5.26.2.5 Embedded DisplayPort ........................................................ 272
5.26.2.6 DisplayPort Aux Channel ..................................................... 272
5.26.2.7 DisplayPort Hot-Plug Detect (HPD) ....................................... 272
5.26.2.8 Integrated Audio over HDMI and DisplayPort ......................... 272
5.26.2.9 Serial Digital Video Out (SDVO) ........................................... 272
5.26.3 Mapping of Digital Display Interface Signals .......................................... 274
5.26.4 Multiple Display Configurations............................................................ 275
5.26.5 High-bandwidth Digital Content Protection (HDCP) ................................. 275
5.26.6 Intel® Flexible Display Interconnect ..................................................... 276
Intel® Virtualization Technology ........................................................................ 276
5.27.1 Intel® VT-d Objectives ....................................................................... 276
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