MX25L8008E データシートの表示（PDF） - Macronix International

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MX25L8008E

8M-BIT [x 1 / x 2] CMOS SERIAL FLASH

Macronix International 

MX25L8008E

Read Serial Flash Discoverable Parameter (RDSFDP) Sequence..................................................................... 23

Table a. Signature and Parameter Identification Data Values ............................................................................ 24

Table b. Parameter Table (0): JEDEC Flash Parameter Tables.......................................................................... 25

Table c. Parameter Table (1): Macronix Flash Parameter Tables........................................................................ 27

POWER-ON STATE.................................................................................................................................................... 29

ELECTRICAL SPECIFICATIONS............................................................................................................................... 30

ABSOLUTE MAXIMUM RATINGS...................................................................................................................... 30

Figure 3. Maximum Negative Overshoot Waveform........................................................................................... 30

CAPACITANCE TA = 25°C, f = 1.0 MHz.............................................................................................................. 30

Figure 4. Maximum Positive Overshoot Waveform............................................................................................. 30

Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................... 31

Figure 6. OUTPUT LOADING............................................................................................................................ 31

Table 8. DC CHARACTERISTICS....................................................................................................................... 32

Table 9. AC CHARACTERISTICS....................................................................................................................... 33

Timing Analysis......................................................................................................................................................... 34

Figure 7. Serial Input Timing............................................................................................................................... 34

Figure 8. Output Timing....................................................................................................................................... 34

Figure 9. Hold Timing.......................................................................................................................................... 35

Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1................................................ 35

Figure 11. Write Enable (WREN) Sequence (Command 06).............................................................................. 36

Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................... 36

Figure 13. Read Status Register (RDSR) Sequence (Command 05)................................................................. 37

Figure 14. Write Status Register (WRSR) Sequence (Command 01)................................................................ 37

Figure 15. Read Data Bytes (READ) Sequence (Command 03)....................................................................... 37

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B).................................................... 38

Figure 17. Dual Output Read Mode Sequence (Command 3B).......................................................................... 39

Figure 18. Sector Erase (SE) Sequence (Command 20)................................................................................... 39

Figure 19. Block Erase (BE) Sequence (Command 52 or D8)........................................................................... 39

Figure 20. Chip Erase (CE) Sequence (Command 60 or C7)............................................................................ 40

Figure 21. Page Program (PP) Sequence (Command 02)................................................................................. 40

Figure 22. Deep Power-down (DP) Sequence (Command B9).......................................................................... 41

Figure 23. Release from Deep Power-down (RDP) Sequence (Command AB)................................................ 41

Figure 24. Read Electronic Signature (RES) Sequence (Command AB)........................................................... 41

Figure 25. Read Identification (RDID) Sequence (Command 9F)....................................................................... 42

Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................... 42

Figure 27. Read Security Register (RDSCUR) Sequence (Command 2B)......................................................... 43

Figure 28. Write Security Register (WRSCUR) Sequence (Command 2F)........................................................ 43

Figure 29. Power-up Timing................................................................................................................................ 44

Table 10. Power-Up Timing ................................................................................................................................ 44

P/N: PM1944

REV. 1.1, DEC. 10, 2013

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