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NT1GD64S8HB0FM データシートの表示(PDF) - Nanya Technology

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NT1GD64S8HB0FM Datasheet PDF : 14 Pages
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NT1GD64S8HA0FM / NT1GD64S8HB0FM
1GB : 128M x 64
PC2700 / PC2100 Unbuffered DDR SO-DIMM
200 pin Unbuffered DDR SO-DIMM Based on DDR333/266 64Mx8 SDRAM
Features
• 200-Pin Small Outline Dual In-Line Memory Module (SO-DIMM)
• 128Mx64 Unbuffered DDR SO-DIMM based on 64Mx8
DDR SDRAM.
• Performance:
PC2700 PC2100
Speed Sort
DIMM CAS Latency
6K
75B Unit
2.5
2.5
fCK Clock Frequency
166 133 MHz
tCK Clock Cycle
6
7.5 ns
fDQ DQ Burst Frequency 333 266 MHz
• Intended for 133 and 166 MHz applications
• Inputs and outputs are SSTL-2 compatible
• VDD = VDDQ = 2.5V ± 0.2V
• SDRAMs have 4 internal banks for concurrent operation
• Module has two physical banks
• Differential clock inputs
• Data is read or written on both clock edges
• DRAM DLL aligns DQ and DQS transitions with clock transitions.
• Address and control signals are fully synchronous to positive
clock edge
• Programmable Operation:
- DIMM CAS Latency: 2, 2.5
- Burst Type: Sequential or Interleave
- Burst Length: 2, 4, 8
- Operation: Burst Read and Write
• Auto Refresh (CBR) and Self Refresh Modes
• Automatic and controlled precharge commands
• 13/11/2 Addressing (row/column/bank)
• 7.8 µs Max. Average Periodic Refresh Interval
• Serial Presence Detect
• Gold contacts
• SDRAMs in 60-ball FBGA Package
Description
NT1GD64S8HA0FM and NT1GD64S8HB0FM are unbuffered 200-Pin Double Data Rate (DDR) Synchronous DRAM Small Outline Dual
In-Line Memory Module (SO-DIMM), organized as two banks of 64x64 high-speed memory array. The module uses sixteen 16Mx8 DDR
SDRAMs in 60-ball FBGA packages. These DIMMs are manufactured using raw cards developed for broad industry use as reference
designs. The use of these common design files minimizes electrical variation between suppliers. All NANYA DDR SDRAM DIMMs provide
a high-performance, flexible 8-byte interface in a 2.66” long space-saving footprint.
The DIMM is intended for use in applications operating up to 166 MHz clock speeds and achieves high-speed data transfer rates of up to
333 MHz. Prior to any access operation, the device CAS latency and burst type/ length/operation type must be programmed into the DIMM
by address inputs A0-A12 and I/O inputs BA0 and BA1 using the mode register set cycle.
The DIMM uses serial presence-detect implemented via a serial EEPROM using a standard IIC protocol. The first 128 bytes of serial PD
data are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.
Ordering Information
Part Number
NT1GD64S8HA0FM-6K
NT1GD64S8HB0FM-6K
NT1GD64S8HA0FM-75B
NT1GD64S8HB0FM-75B
Speed
DDR333
PC2700 166MHz (6ns @ CL = 2.5)
2.5-3-3 133MHz (7.5ns @ CL = 2)
PC2100 133MHz (7.5ns @ CL = 2.5)
DDR266B
2.5-3-3 100MHz (10ns @ CL = 2)
Power Organization Leads
2.5V
128Mx64
Gold
REV 1.2
12/19/2003
Preliminary
1
© NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.

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