NT1GD64S8HB0FM データシートの表示（PDF） - Nanya Technology
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NT1GD64S8HB0FM
Nanya Technology
NT1GD64S8HB0FM Datasheet PDF : 14 Pages
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NT1GD64S8HA0FM / NT1GD64S8HB0FM
1GB : 128M x 64
PC2700 / PC2100 Unbuffered DDR SO-DIMM
Absolute Maximum Ratings
Symbol
Parameter
Rating
Units
VIN, VOUT
Voltage on I/O pins relative to VSS
-0.5 to VDDQ +0.5
V
VIN
Voltage on Input relative to VSS
-0.5 to +3.6
V
VDD
Voltage on VDD supply relative to VSS
-0.5 to +3.6
V
VDDQ
Voltage on VDDQ supply relative to VSS
-0.5 to +3.6
V
TA
Operating Temperature (Ambient)
0 to +70
°C
TSTG
Storage Temperature (Plastic)
-55 to +150
°C
PD
Power Dissipation
16
W
IOUT
Short Circuit Output Current
50
mA
Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is stress
rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics and Operating Conditions
TA = 0 °C ~ 70 °C; VDDQ = VDD = 2.5V ± 0.2V
Symbol
VDD
VDDQ
VSS, VSSQ
VREF
VTT
VIH (DC)
VIL (DC)
VIN (DC)
VID (DC)
Parameter
Supply Voltage
I/O Supply Voltage
Supply Voltage, I/O Supply Voltage
I/O Reference Voltage
I/O Termination Voltage (System)
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and CK Inputs
Input Differential Voltage, CK and CK Inputs
Min
2.3
2.3
0
0.49 x VDDQ
VREF – 0.04
VREF + 0.15
-0.3
-0.3
0.30
Max
2.7
2.7
0
0.51 x VDDQ
VREF + 0.04
VDDQ + 0.3
VREF - 0.15
VDDQ + 0.3
VDDQ + 0.6
Units
V
V
V
V
V
V
V
V
V
Notes
1
1
1, 2
1, 3
1
1
1
1, 4
Input Leakage Current
II
Any input 0V ≤ VIN ≤ VDD; (All other pins not under test = 0V)
-10
10
µA
1
Output Leakage Current
IOZ
(DQs are disabled; 0V ≤ Vout ≤ VDDQ
-10
10
µA
1
Output High Current
IOH
(VOUT = VDDQ -0.373V, min VREF, min VTT)
-16.8
-
mA
1
Output Low Current
IOL
(VOUT = 0.373, max VREF, max VTT)
16.8
-
mA
1
1. Inputs are not recognized as valid until VREF stabilizes.
2. VREF is expected to be equal to 0.5 VDDQ of the transmitting device, and to track variations in the DC level of the same. Peak-to-peak
noise on VREF may not exceed 2% of the DC value.
3. VTT is not applied directly to the DIMM. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF,
and must track variations in the DC level of VREF.
4. VID is the magnitude of the difference between the input level on CK and the input level on CK.
REV 1.2
12/19/2003
Preliminary
7
© NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
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