NT1GD64S8HB0FM データシートの表示（PDF） - Nanya Technology

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NT1GD64S8HB0FM

1GB, 512MB and 256MB 200 pin Unbuffered DDR SO-DIMM Based on DDR333 512Mb bit B Die device

Nanya Technology 

NT1GD64S8HA0FM / NT1GD64S8HB0FM

1GB : 128M x 64

PC2700 / PC2100 Unbuffered DDR SO-DIMM

AC Characteristics

Notes 1-5 apply to the following Tables; Electrical Characteristics and DC Operating Conditions, AC Operating

Conditions, Operating, Standby, and Refresh Currents, and Electrical Characteristics and AC Timing.)

1. All voltages referenced to VSS.

2. Tests for AC timing, IDD, and electrical, AC and DC characteristics, may be conducted at nominal reference/supply voltage levels, but the

related specifications and device operation are guaranteed for the full voltage range specified.

3. Outputs measured with equivalent load. Refer to the AC Output Load Circuit below.

4. AC timing and IDD tests may use a VIL to VIH swing of up to 1.5V in the test environment, but input timing is still referenced to VREF (or to

the crossing point for CK, CK), and parameter specifications are guaranteed for the specified AC input levels under normal use conditions.

The minimum slew rate for the input signals is 1V/ns in the range between VIL (AC) and VIH (AC) unless otherwise specified.

5. The AC and DC input level specifications are as defined in the SSTL_2 Standard (i.e. the receiver effectively switches as a result of the

signal crossing the AC input level, and remains in that state as long as the signal does not ring back above (below) the DC input LOW

(HIGH) level.

AC Output Load Circuits

VTT

50 ohms

Output

VOUT

30 pF

Timing Reference Point

AC Operating Conditions

TA = 0 °C ~ 70 °C; VDDQ = VDD = 2.5V ± 0.2V

Symbol

Parameter/Condition

Min

Max

Unit Notes

VIH (AC) Input High (Logic 1) Voltage.

VREF + 0.31

V

1, 2

VIL (AC) Input Low (Logic 0) Voltage.

VREF - 0.31

V

1, 2

VID (AC) Input Differential Voltage, CK and CK Inputs

0.62

VDDQ + 0.6

V

1, 2, 3

VIX (AC) Input Differential Pair Cross Point Voltage, CK and CK Inputs (0.5* VDDQ) - 0.2 (0.5* VDDQ) + 0.2

V

1, 2, 4

1. Input slew rate = 1V/ ns.

2. Inputs are not recognized as valid until VREF stabilizes.

3. VID is the magnitude of the difference between the input level on CK and the input level on CK.

4. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.

REV 1.2

12/19/2003

Preliminary

8

© NANYA TECHNOLOGY CORPORATION

NANYA reserves the right to change products and specifications without notice.

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