MT8880C データシートの表示（PDF） - Zarlink Semiconductor Inc

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MT8880C

ISO²-CMOS Integrated DTMF Transceiver

Zarlink Semiconductor Inc 

DTMF/CP

INPUT

C1

R1

R2

DTMF

OUTPUT

R5

C4

X-tal

RL

ISO2-CMOS MT8880C

MT8880C

IN+

VDD

IN-

St/GT

GS

VRef

ESt

R3

D3

VSS

D2

OSC1

D1

OSC2

D0

TONE

R/W

IRQ/CP

Φ2

CS

RS0

VDD

C3

C2

R4

To µP

or µC

Notes:

R1, R2 = 100 kΩ 1%

R3 = 374 kΩ 1%

R4 = 3.3 kΩ 10%

R5 = 4.7 MΩ 10%

RL = 10 k Ω (min.)

C1 = 100 nF 5%

C2 = 100 nF 5%

C3 = 100 nF 10%*

C4 = 10 nF 10%

X-tal = 3.579545 MHz

* Microprocessor based systems can inject undesirable noise into

the supply rails. The performance of the MT8880 can be optimized

by keeping noise on the supply rails to a minimum. The decoupling

capacitor (C3) should be connected close to the device and ground

loops should be avoided.

Figure 13 - Application Circuit (Single-Ended Input)

MMD6150

(or equivalent)

TEST POINT

5.0 VDC

2.4 kΩ

130 pF

24 kΩ

MMD7000

(or equivalent)

TEST POINT

5.0 VDC

3 kΩ

70 pF

Test load for D0-D3 pins

Test load for IRQ/CP pin

Figure 14 - Test Circuit

11

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