DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MT8880C データシートの表示(PDF) - Zarlink Semiconductor Inc

部品番号
コンポーネント説明
メーカー
MT8880C
ZARLINK
Zarlink Semiconductor Inc ZARLINK
MT8880C Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ISO2-CMOS MT8880C
Functional Description
The MT8880C Integrated DTMF Transceiver
architecture consists of a high performance DTMF
receiver with internal gain setting amplifier and a
DTMF generator which employs a burst counter such
that precise tone bursts and pauses can be
synthesized. A call progress mode can be selected
such that frequencies within the specified passband
can be detected. A standard microprocessor
interface allows access to an internal status register,
two control registers and two data registers.
Input Configuration
The input arrangement of the MT8880C provides a
differential-input operational amplifier as well as a
bias source (VRef) which is used to bias the inputs at
VDD/2. Provision is made for connection of a
feedback resistor to the op-amp output (GS) for
adjustment of gain. In a single-ended configuration,
the input pins are connected as shown in Figure 3.
Figure 4 shows the necessary connections for a
differential input configuration.
C
RIN
VOLTAGE GAIN
(AV) = RF / RIN
IN+
IN-
RF
GS
VRef
MT8880C
Figure 3 - Single-Ended Input Configuration
Receiver Section
Separation of the low and high group tones is
achieved by applying the DTMF signal to the inputs
of two sixth-order switched capacitor bandpass
filters, the bandwidths of which correspond to the low
and high group frequencies (see Fig. 7). These filters
also incorporate notches at 350 Hz and 440 Hz for
exceptional dial tone rejection. Each filter output is
followed by a single order switched capacitor filter
section which smooths the signals prior to limiting.
Limiting is performed by high-gain comparators
C1
R1
IN+
C2
R4
R3
R5
R2
DIFFERENTIAL INPUT AMPLIFIER
C1 = C2 = 10 nF
R1 = R4 = R5 = 100 k
R2 = 60k, R3 = 37.5 k
R3 = (R2R5)/(R2 + R5)
VOLTAGE GAIN
(AV diff) = R5/R1
INPUT IMPEDANCE
(ZINdiff) = 2 R12 + (1/ωC)2
IN-
GS
VRef
MT8880C
Figure 4 - Differential Input Configuration
which are provided with hysteresis to prevent
detection of unwanted low-level signals. The outputs
of the comparators provide full rail logic swings at the
frequencies of the incoming DTMF signals.
Following the filter section is a decoder employing
digital counting techniques to determine the
frequencies of the incoming tones and to verify that
they correspond to standard DTMF frequencies. A
complex averaging algorithm protects against tone
simulation by extraneous signals such as voice while
providing tolerance to small frequency deviations
and variations. This averaging algorithm has been
developed to ensure an optimum combination of
immunity to talk-off and tolerance to the presence of
interfering frequencies (third tones) and noise. When
the detector recognizes the presence of two valid
tones (this is referred to as the “signal condition” in
some industry specifications) the “Early Steering”
(ESt) output will go to an active state. Any
subsequent loss of signal condition will cause ESt to
assume an inactive state.
3

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]