HD404668 データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HD404668

Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

Hitachi -> Renesas Electronics 

HD404669 Series

RAM Memory Map

The MCU contains a RAM area consisting of a memory register area, a data area, and a stack area. In

addition, an interrupt control bits area, special function register area, and register flag area are mapped onto

the same RAM memory space. The RAM memory map is shown in figure 2 and described below.

RAM-Mapped Register Area ($000–$03F):

• Interrupt Control Bits Area ($000–$003)

This area is used for interrupt control bits (figure 3). These bits can be accessed only by RAM bit

manipulation instructions (SEM/SEMD, REM/REMD, and TM/TMD). However, note that not all the

instructions can be used for each bit. Limitations on using the instructions are shown in figure 4.

• Special Function Register Area ($004–$01F, $024–$03F)

This area is used as mode registers and data registers for external interrupts, serial interface, timers,

DTMF, comparator, and as data control registers for I/O ports. The structure is shown in figures 2 and

5. These registers can be classified into three types: write-only (W), read-only (R), and read/write

(R/W). RAM bit manipulation instructions cannot be used for these registers.

• Register Flag Area ($020–$023)

This area is used for the DTON, WDON, and other register flags and interrupt control bits (figure 3).

These bits can be accessed only by RAM bit manipulation instructions (SEM/SEMD, REM/REMD, and

TM/TMD). However, note that not all the instructions can be used for each bit. Limitations on using

the instructions are shown in figure 4.

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