FSFR1700 データシートの表示（PDF） - Fairchild Semiconductor

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FSFR1700

Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converters

Fairchild Semiconductor 

Pin Configuration

1 2 3 4 5 6 7 8 9 10

VDL

RT SG LVcc

VCTR

CON CS PG

HVcc

Figure 3. Package Diagram

Pin Definitions

Pin #

1

Name

VDL

2

CON

3

RT

4

CS

5

SG

6

PG

7

LVCC

8

NC

9

HVCC

10

VCTR

Description

This is the drain of the high-side MOSFET, typically connected to the input DC link voltage.

This pin is for enable/disable and protection. When the voltage of this pin is above 0.6V, the

IC operation is enabled. When the voltage of this pin drops below 0.4V, gate drive signals

for both MOSFETs are disabled. When the voltage of this pin increases above 5V,

protection is triggered.

This pin programs the switching frequency. Typically, an opto-coupler is connected to

control the switching frequency for the output voltage regulation.

This pin senses the current flowing through the low-side MOSFET. Typically, negative

voltage is applied on this pin.

This pin is the control ground.

This pin is the power ground. This pin is connected to the source of the low-side MOSFET.

This pin is the supply voltage of the control IC.

No connection.

This is the supply voltage of the high-side gate-drive circuit IC.

This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin.

© 2007 Fairchild Semiconductor Corporation

FSFR series • 1.0.3

3

www.fairchildsemi.com

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