FSFR1800US データシートの表示（PDF） - Fairchild Semiconductor

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FSFR1800US

Fairchild Power Switch (FPS™) for Half-Bridge Resonant Converters

Fairchild Semiconductor 

Functional Description

1. Basic Operation: FSFR-US series is designed to

drive high-side and low-side MOSFETs complementarily

with 50% duty cycle. A fixed dead time of 350ns is

introduced between consecutive transitions, as shown in

Figure 15.

Figure 15. MOSFETs Gate Drive Signal

2. Internal Oscillator: FSFR-US series employs a

current-controlled oscillator, as shown in Figure 16.

Internally, the voltage of RT pin is regulated at 2V and the

charging / discharging current for the oscillator capacitor,

CT, is obtained by copying the current flowing out of the

RT pin (ICTC) using a current mirror. Therefore, the

switching frequency increases as ICTC increases.

Figure 17. Resonant Converter Typical Gain Curve

Figure 16. Current Controlled Oscillator

Figure 18. Frequency Control Circuit

3. Frequency Setting: Figure 17 shows the typical

voltage gain curve of a resonant converter, where the

gain is inversely proportional to the switching frequency

in the ZVS region. The output voltage can be regulated

by modulating the switching frequency. Figure 18 shows

the typical circuit configuration for the RT pin, where the

opto-coupler transistor is connected to the RT pin to

modulate the switching frequency.

The minimum switching frequency is determined as:

f min = 5.2kΩ ×100(kHz)

(1)

Rmin

Assuming the saturation voltage of opto-coupler

transistor is 0.2V, the maximum switching frequency is

determined as:

f max = (5.2kΩ + 4.68kΩ ) ×100 (kHz)

Rmin

Rmax

(2)

To prevent excessive inrush current and overshoot of

output voltage during startup, increase the voltage gain

of the resonant converter progressively. Since the

voltage gain of the resonant converter is inversely

proportional to the switching frequency, the soft-start is

implemented by sweeping down the switching frequency

from an initial high frequency (f I S S ) until the output

voltage is established. The soft-start circuit is made by

connecting R-C series network on the RT pin, as shown

in Figure 18. FSFR-US series also has an internal soft-

start for 3ms to reduce the current overshoot during the

initial cycles, which adds 40kHz to the initial frequency of

the external soft-start circuit, as shown in Figure 19. The

initial frequency of the soft-start is given as:

f ISS = (5.2kΩ + 5.2kΩ ) ×100 + 40 (kHz)

Rmin

RSS

(3)

© 2009 Fairchild Semiconductor Corporation

FSFR-US Series • Rev.1.0.2

10

www.fairchildsemi.com

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