ICX252 データシートの表示（PDF） - Sony Semiconductor

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ICX252

Timing Generator and Signal Processor for Frame Readout CCD Image Sensor

Sony Semiconductor 

CXD3406GA

Control data/shutter data: [Electronic shutter]

The CXD3406GA realizes various electronic shutter functions by using control data D13 to D14 SMD and

shutter data D10 to D19 SVD, D20 to D31 SHD and D32 to D41 SPL.

These functions are described in detail below.

First, the various modes are shown below.

These modes are switched using control data D13 to D14 SMD.

D14 D13

Description of operation

0

0 Electronic shutter stopped mode

0

1

High-speed/low-speed shutter mode

1

0

1

1 HTSG control mode

The electronic shutter data is expressed as shown in the table below using D20 to D31 SHD as an example.

However, MSB (D31) is a reserve bit for the future specification, and it is handled as a dummy on this IC.

MSB

LSB

D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20

X00111000011

↓

↓

↓

1

C

3

SHD is expressed as 1C3h .

[Electronic shutter stopped mode]

During this mode, all shutter data items are invalid.

SUB is not output in this mode, so the shutter speed is the accumulation time for one field.

[High-speed/low-speed shutter mode]

During this mode, the shutter data items have the following meanings.

Symbol

Data

Description

SVD D10 to D19 Number of vertical periods specification (000h ≤ SVD ≤ 3FFh)

SHD D20 to D31 Number of horizontal periods specification (000h ≤ SHD ≤ 7FFh)

SPL D32 to D41 Vertical period specification for high-speed shutter operation (000h ≤ SPL ≤ 3FFh)

The period during which SVD and SHD are specified together is the shutter speed. Concretely, when

specifying high-speed shutter, SVD is set to "000h". (See the figure.) During low-speed shutter, or in other

words when SVD is set to "001h" or higher, the serial interface data is not loaded until this period is finished.

The vertical period indicated here corresponds to one field in each drive mode. In addition, the number of

horizontal periods applied to SHD can be considered as (number of SUB pulses – 1). However, in the frame

mode A field, it matches (number of SUB pulses + 1). This is a specification for flickerless when the same

mode is repeated. But this change may not occur because of flickerless depending on the conditions during

low-speed shutter.

Note) The bit data definition area is assured in terms of the CXD3406GA functions, and does not assure the

CCD characteristics.

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