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ACD81024 データシートの表示(PDF) - Unspecified

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ACD81024 Datasheet PDF : 17 Pages
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1 frame with unicast destination address and
update the value of the MAC address storage of the
does not match with any port MAC address of source port. The value of DA is used to identify the
the switch
destination port.
2 frame with broadcast/multicast address
3 frame dumped to keep DTE address alive (see
section of “Address Keep Alive Handling”)
4.4 Switch Fabric Module
Address Keep Alive Handling
The address learned by an interconnection device
has a limited life cycle. To keep the address of the
DTEs connected with the switch alive in the intercon-
nection device connected with the expansion port of
the switch, ACD81024 can be set to dump at least
one frame to the expansion port for every five min-
utes. This function can be disabled by pulling low of
the DMPE signal.
Half Duplex Operation Mode
ACD81024 can only work in half duplex mode. Any
concurrent transmit and receive activities will be
treated as collision.
Spanning Tree Handling
Switch Fabric is responsible for establishing the
connection channel(s) from a source port to the
corresponding destination port(s). ACD81024 imple-
ments a cross-bar type switch fabric that allows high
efficient multiple channels of simultaneous connec-
tions.
4.5 Fabric Control Module
Fabric Control Logic controls the process of construc-
tion/destruction of the communication channel in the
Switch Fabric. Before a connection can be made,
Fabric Control logic first checks the status of the
destination port(s), to see if it is suitable to open the
path. Fabric Control logic is responsible to notify the
source MAC logic if the requested connection has
been made or not.
Only port 24 of ACD81024 can be used to connect
with an interconnection device which support multiple
MAC addresses. All other ports of ACD81024 should
only be used to connect with one desktop DTE with
only one MAC address. Therefore, it is not necessary
to handle Spanning Tree protocol to avoid formation
of a loop.
Latency
The latency, defined by the time difference between
the first bit enters into ACD81024 and first bit comes
out of ACD81024, is a constant value of 146 Bit Time.
Collision Domain
Different from typical Ethernet switch, ACD81024
does not isolate the collision domain between the
source DTE and the destination DTE. Therefore, the
latency of ACD81024 needs to be counted as part of
the delay path. The delay on the forward path is 146
Bit Times. The delay on the backward path (for
collision detection) is 4 Bit Times.
4.3 Lookup Engine Module
The lookup engine is responsible to provide mapping
between a MAC address and a port number. It
contains one MAC address storage for each port. The
value of SA embedded inside the frame is used to
4.6 LED Control Module
Just like a shared media repeater system, ACD81024
is designed to have a wide variety of LED indicators
for simple system administration. The display update
is completely autonomous and merely requires low
speed TTL or CMOS devices as LED drivers. The
status display is designed to be flexible to allow the
system designer to choose those indicators appropri-
ate for the specification of the equipment.
There are two LED control signals. LEDVLD signal is
used to indicate the start and end of the LED data
signal. LEDCLK signal is a 1MHz clock signal. The
rising edge of LEDCLK can be used to latch the LED
data signal into the LED driver circuitry.
The LED data signals contain Lnk, Xmt, Rcv, Col,
Fbe, Jbr, Addr and Bsy, which represent Link status,
Transmit status, Receive status, Collision indication,
Frame Bit Error, Jabber error, Port Address Learned
status, and Congestion Control status respectively.
These status signals are sent out sequentially from
port one to port twenty-four, once every 100ms. For
details about the timing diagrams of the LED signals,
refer to the chapter of “Signal Waveforms.”
5. SPECIAL HANDLING ON 802.3
ACD Confidential. Do Not Reproduce. Use under Non-Disclosure agreement only.
8

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