LTC6803 データシートの表示（PDF） - Linear Technology

部品番号

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LTC6803

Multicell Battery Stack Monitor

Linear Technology 

LTC6803-1/LTC6803-3

APPLICATIONS INFORMATION

ADDING CALIBRATION AND FULL-STACK

MEASUREMENTS

The general purpose VTEMP ADC inputs may be used to digi-

tize any signals from 0V to 4V with accuracy corresponding

closely with that of the cell 1 ADC input. One useful signal

to provide is a high accuracy voltage reference, such as

3.300V from an LTC6655-3.3. From periodic readings of

this signal, the host software can provide correction of

the LTC6803 readings to improve the accuracy over that

of the internal LTC6803 reference and/or validate ADC

operation. Figure 20 shows a means of selectively pow-

ering an LTC6655-3.3 from the battery stack, under the

control of the GPIO1 output of the LTC6803-1. Since the

operational power of the reference IC would add significant

thermal loading to the LTC6803 if powered from VREG, an

external high voltage NPN pass transistor is used to form

a local 4.4V (Vbe below VREG) from the battery stack. The

GPIO1 signal controls a PMOS FET switch to activate the

reference when calibration is to be performed. Since GPIO

signals default to logic high in shutdown, the reference

will automatically turn off during idle periods.

Another useful signal is a measure of the total stack poten-

tial. This provides a redundant operational measurement

of the cells in the event of a malfunction in the normal

acquisition process, or as a faster means of monitoring

the entire stack potential. Figure 21 shows how a resis-

tive divider is used to derive a scaled representation of a

full cell group potential. A MOSFET is used to disconnect

TOP CELL POTETNTIAL

1M

LTC6803-1 38

GPIO1

34

VREG

31

VTEMP1

V– 29

CZT5551

Si2351DS

1µF

10µF

100nF

1

LTC6655-3.3

SHDN GND

8

2 VIN

3 GND

4 GND

VOUT_F 7

VOUT_S 6

GND 5

680313 F20

Figure 20. Providing Measurement of Calibration Reference

CELL GROUP+

WDTB

VREG

VTEMP1

V–

CELL GROUP–

499k

1M

8

3

1 1/2 LT6004

2

1

2N7002K

2

3

1µF

10nF

4

31.6k

680313 F21

Figure 21. Using a VTEMP Input for Full-Stack Readings

680313f

33

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