AD5206(2015) データシートの表示（PDF） - Analog Devices
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AD5206 Datasheet PDF : 20 Pages
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AD5204/AD5206
Data Sheet
32 31 30 29 28 27 26 25
VSS 1
NC 2
NC 3
NC 4
NC 5
B3 6
W3 7
A3 8
PIN 1
INDICATOR
AD5204
TOP VIEW
(Not to Scale)
24 NC
23 NC
22 NC
21 NC
20 B4
19 W4
18 A4
17 NC
9 10 11 12 13 14 15 16
NOTES
1. NC = NO CONNECT.
2. THE LFCSP PACKAGE HAS AN EXPOSED
PADDLE THAT SHOULD BE CONNECTED TO
GND AND THE ASSOCIATED PCB
GROUND PLATE.
Figure 7. AD5204 LFCSP Pin Configuration
Table 4. AD5204 LFCSP Pin Function Descriptions
Pin No. Name Description
1
2 to 5, 9,
16, 17,
21 to 24
6
7
8
10
11
12
13
14
15
18
19
20
25
26
VSS
NC
B3
W3
A3
B1
W1
A1
A2
W2
B2
A4
W4
B4
GND
CS
27
PR
Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |VDD| + |VSS| < 5.5 V.
Not Connected.
Terminal B RDAC 3.
Wiper RDAC 3. Address = 0102.
Terminal A RDAC 3.
Terminal B RDAC 1.
Wiper RDAC 1. Address = 0002.
Terminal A RDAC 1.
Terminal A RDAC 2.
Wiper RDAC 2. Address = 0012.
Terminal B RDAC 2.
Terminal A RDAC 4.
Wiper RDAC 4. Address = 0112.
Terminal B RDAC 4.
Ground.
Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address
bits, and then it is loaded into the target RDAC latch.
Preset to Midscale (Active Low). This pin sets the RDAC registers to 0x80.
28
VDD
Positive Power Supply. This pin is specified for operation at both 3 V and 5 V. It is the sum of |VDD| + |VSS| < 5.5 V.
29
SHDN Terminal A Open-Circuit Shutdown (Active Low Input). This pin controls VR 1 through VR 4.
30
SDI Serial Data Input. Data is input MSB first.
31
CLK Serial Clock Input. This pin is positive edge triggered.
32
SDO Serial Data Output. This pin is an open-drain transistor and requires a pull-up resistor.
Rev. D | Page 8 of 20
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