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MDT2010JG データシートの表示(PDF) - Micon Design Technology Corporation

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MDT2010JG
MDTIC
Micon Design Technology Corporation MDTIC
MDT2010JG Datasheet PDF : 15 Pages
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MDT2010(JG)
7. Reset Condition for all Registers
Register Address Power-On Reset /MCLR or WDT Reset
CPIO A
CPIO B
TMR
IAR
--
--
--
00h
1111 1111
1111 1111
--11 1111
1111 1111
1111 1111
--11 1111
RTCC
01h
xxxx xxxx
uuuu uuuu
PC
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
MSR
04h
111x xxxx
111u uuuu
PORT A
05h
- - - - xxxx
- - - - uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
Note : uunchanged, xunknown, - unimplemented, read as “0”
#value depends on the condition of the following table
Condition
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Status: bit 4
u
1
0
0
Status: bit 3
u
0
1
0
8. Instruction Set
Instruction Code
010000 00000000
010000 00000001
010000 00000010
010000 00000011
010000 00000100
010000 00000rrr
010001 1rrrrrrr
011000 trrrrrrr
111010 iiiiiiii
Mnemonic
Operands
Function
NOP
No operation
CLRWT
Clear Watchdog timer
SLEEP
Sleep mode
TMODE
Load W to TMODE register
RET
Return
CPIO R
Control I/O port register
STWR R Store W to register
LDR R, t Load register
LDWI I
Load immediate to W
Operating
Status
None
0WT
TF, PF
0WT, stop OSC TF, PF
WTMODE
None
StackPC
None
WCPIO r
None
WR
None
Rt
Z
IW
None
This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw
P. 5
2006/4 VER1.1

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