TC9329FA データシートの表示（PDF） - Toshiba
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TC9329FA Datasheet PDF : 83 Pages
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Pin No. Symbol
HOLD
34 /INTR2
/PCTRin
Pin Name
Function and Operation
Input pin for request/release hold mode.
Normally, this pin is used to input radio
mode selection signals or battery
detection signals.
Hold mode includes CLOCK STOP
mode (stops crystal oscillation) and
WAIT mode (halts CPU). Setting is
implemented with the CKSTP
instruction or the WAIT instruction.
Hold mode control
input
To request Clock Stop mode, either
L-level detection on the HOLD pin or
forced execution can be programmed.
The mode is released by H-level
detection on the HOLD pin or input
change, respectively. Executing the
CKSTP instruction stops the clock
generator and the CPU, entering
memory backup state. In memory
backup state, current dissipation
becomes low (1 µA or less) and the
display output/CMOS output ports
automatically become L level and N-ch
open drain output Off.
/External interrupt
input
/Plus count input
Regardless of this input state, Wait
mode is executed in order to lower
power dissipation. Either crystal
oscillator only in operation or CPU
suspension can be programmed. For
crystal oscillator only in operation, all
displays are at L level and other pins
are in hold state. For CPU suspension,
the CPU stops and all others retain
their states. Wait mode is released by
changing HOLD input.
The P34 pin is also used for external
interrupt input. When interrupts are
enabled and a 13.3 to 26.7 µA pulse or
longer is input to the pin, interrupt
INTR1/2 is generated and the program
jumps to address 1/2. Input logic or
rising/falling edge can be selected for
each input interrupt.
The internal 8 bit timer clock input can
be selected as input to the pins. When
the count value reaches the specified
value, an interrupt is generated
(address 4).
The pin is also used for input of an 8 bit
pulse counter. Input rising/falling or
upcount/downcount can be selected for
the counter.
TC9329FA/FB
Remarks
VDD
7
2002-02-07
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