UPD45D128164 データシートの表示（PDF） - Elpida Memory, Inc

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UPD45D128164

128 M-bit Synchronous DRAM with Double Data Rate(4-bank, SSTL_2)

Elpida Memory, Inc 

µPD45D128442, 45D128842, 45D128164

12. Burst Termination … 34

12.1 Burst Stop Command in Read Cycle … 34

12.2 Precharge Termination in Read Cycle … 35

12.3 Precharge Termination in Write Cycle … 36

13. Electrical Specifications … 37

13.1 Absolute Maximum Ratings … 37

13.2 Recommended Operating Conditions … 37

13.3 Pin Capacitance (TA = 25 °C, f = 1 MHz) … 37

13.4 DC Characteristics 1 (Recommended Operating Conditions unless otherwise noted) … 38

13.5 DC Characteristics 2 (Recommended Operating Conditions unless otherwise noted) … 38

13.6 AC Characteristics (Recommended Operating Conditions unless otherwise noted) … 39

13.6.1 Test Conditions … 39

13.6.2 Timing Diagram … 40

13.6.3 Synchronous Characteristics … 41

13.6.4 Synchronous Characteristics Example … 42

13.6.5 Asynchronous Characteristics … 42

14. Package Drawing … 74

15. Recommended Soldering Conditions … 75

16. Revision History … 76

Data Sheet E0030N10

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