STK14C88-C35M データシートの表示（PDF） - Unspecified
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STK14C88-C35M Datasheet PDF : 12 Pages
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STK14C88-M
HARDWARE MODE SELECTION
E
W
HSB
A13 - A0 (hex)
H
X
H
X
L
H
H
X
L
L
H
X
X
X
L
X
L
H
H
0E38
31C7
03E0
3C1F
303F
0FC0
L
H
H
0E38
31C7
03E0
3C1F
303F
0C63
MODE
Not Selected
Read SRAM
Write SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
I/O
Output High Z
Output Data
Input Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
POWER
Standby
Active
Active
lCC2
Active
lCC2
Active
NOTES
p
m
n, o, p
n, o, p
Note m: HSB store operation occurs only if an SRAM WRITE has been done since the last nonvolatile cycle. After the store (if any) completes, the part
will go into standby mode, inhibiting all operations until HSB rises.
Note n: The six consecutive addresses must be in order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
Note o: While there are 15 addresses on the STK14C88-M, only the lower 14 are used to control software modes.
Note p: I/O state assumes G < VIL. Activation of nonvolatile cycles does not depend on state of G.
HARDWARE STORE CYCLE
(VCC = 5.0V ± 10%)e
SYMBOLS
NO.
Standard
Alternate
PARAMETER
22
tSTORE
tHLHZ
23
tDELAY
tHLQZ
24
tRECOVER
tHHQX
25
tHLHX
26
tHLBL
STORE Cycle Duration
Time Allowed to Complete SRAM Cycle
Hardware STORE High to Inhibit Off
Hardware STORE Pulse Width
Hardware STORE Low to STORE Busy
Note q: E and G low and W high for output behavior.
Note r: tRECOVER is only applicable after tSTORE is complete.
STK14C88-M
MIN MAX
10
1
700
20
300
UNITS NOTES
ms
i, q
µs
i, q
ns
q, r
ns
ns
HARDWARE STORE CYCLE
HSB (IN)
25
tHLHX
22
tSTORE
24
tRECOVER
HSB (OUT)
DQ (DATA OUT)
26
tHLBL
HIGH IMPEDANCE
23
tDELAY
DATA VALID
HIGH IMPEDANCE
DATA VALID
April 1999
5-47
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