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LM25115 データシートの表示(PDF) - National ->Texas Instruments

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LM25115
NSC
National ->Texas Instruments NSC
LM25115 Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Descriptions (Continued)
Pin
Name
Description
Application Information
9
SYNC Synchronization input
A low impedance current input pin. The current into this pin sets
the RAMP capacitor charge current and the frequency of an
internal oscillator that provides a clock for the free-run (DC
input) mode .
10
PGND Power Ground
Connect directly to the analog ground pin (AGND).
11
LO
Low side gate driver output
Connect to the gate of the low side synchronous MOSFET
through a short, low inductance path.
12
VCC Output of bias regulator
Nominal 7V output from the internal LDO bias regulator. Locally
decouple to PGND using a low ESR/ESL capacitor located as
close to controller as possible.
13
HS
High side MOSFET source connection Connect to negative terminal of the bootstrap capacitor and the
source terminal of the high side MOSFET.
14
HO
High side gate driver output
Connect to the gate of high side MOSFET through a short, low
inductance path.
15
HB
High side gate driver bootstrap rail
Connect to the cathode of the bootstrap diode and the positive
terminal of the bootstrap capacitor. The bootstrap capacitor
supplies current to charge the high side MOSFET gate and
should be placed as close to controller as possible.
16
VBIAS Supply Bias Input
Input to the LDO bias regulator and current sense amplifier that
powers internal blocks. Input range of VBIAS is 4.5V to 30V.
- Exposed Pad Exposed Pad, underside of LLP package Internally bonded to the die substrate. Connect to system
(LLP
ground for low thermal impedance.
Package
Only)
3
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