SI2403 データシートの表示（PDF） - Silicon Laboratories

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SI2403

V.22BIS ISOMODEM® CHIPSET WITH ERROR CORRECTION

Silicon Laboratories 

Si2403

4. Functional Description

The ISOmodem® chipset is a complete embedded-

modem chipset with integrated direct-access

arrangement (DAA) that provides a programmable line

interface to meet global telephone line requirements.

Available in two small packages, this solution includes a

DSP data pump, a modem controller, on-chip RAM and

ROM, an analog front end (AFE), a DAA, and analog

output.

The Si2403 accepts standard modem AT commands and

provides connect rates up to 2400 bps full-duplex over

the public switched telephone network (PSTN). The

Si2403 features a complete set of modem protocols

including all ITU-T standard formats up to 2400 bps.

The Si2403 provides numerous additional features for

embedded modem applications. The modem includes full

caller ID detection and decoding for global standards.

Call progress is supported through echoing result codes

and is also programmable to meet global settings.

Because the Si2403 integrates the DAA, analog features,

such as parallel phone detect, overcurrent detection, and

global PTT compliance with a single design, are included.

This device is ideal for embedded modem applications

due to its small board space, low power consumption,

and global compliance. The Si2403 solution includes a

silicon DAA using Silicon Laboratories’ proprietary

capacitive isolation technology. This highly-integrated

DAA can be programmed to meet worldwide PTT

specifications for ac termination, dc termination, ringer

impedance, and ringer threshold. In addition, the Si2403

has been designed to meet the most stringent worldwide

requirements for out-of-band energy, billing-tone

immunity, lightning surges, and safety requirements.

The Si2403 is designed to be rapidly incorporated into

existing modem applications. The device interfaces

directly through either a serial UART to a microcontroller

or to a PC through a standard RS-232 transceiver. This

interface allows for PC evaluation of the modem

immediately upon powerup via the AT commands using

standard terminal software. The Si2403 also provides an

8-bit parallel port.

The Si2403 solution requires only a few low-cost discrete

components to achieve global compliance. See "Typical

Application Schematic" on page 11.

4.1. Digital Interface

The ISOmodem chipset digital I/O can be configured as

either a serial UART interface with flow control or as a

parallel 8-bit interface.

Selection of a serial or parallel I/O interface is

determined by the state of AOUT/INT (Si2403, pin 13)

during the rising edge of RESET. An internal pullup

resistor forces the default state to serial mode

operation. An external 10 kΩ pulldown resistor can be

connected to AOUT/INT to force selection of parallel

mode. Additionally, when selecting parallel mode, CS

should remain high until after the rising edge of RESET.

Configuration of pins 3, 4, 8–11, 13–16, and 22–24 is

determined by this interface selection.

4.2. Serial Interface

The ISOmodem chipset supports data terminal

equipment (DTE) rates up to 307.2 kbps with the

standard serial UART format. Upon powerup, the UART

defaults to a 19.2 kbps baud rate. If a pulldown resistor

≤ 10 kΩ is placed between D2 (Si2403, pin 16) and

GND (Si2403, pin 6), the DTE rate is set by the

autobaud feature after reset.

The serial interface also provides a hardware pin, DCD

(data carrier detect), which remains low as long as the

Si2403 is connected.

The INT interrupt pin can be programmed to alert the

host of changes to the interrupts listed in I/O Control 0

(U70).

4.2.1. Autobaud

The ISOmodem chipset includes an automatic baud

rate detection feature that allows the host to start

transmitting data at any standard DTE rate from

300 bps to 307.2 kbps. This feature is enabled by

placing a pulldown resistor <10 kΩ between D2 (pin 16)

and GND.

4.3. Parallel Interface

The parallel interface is an 8-bit data bus with a single

bit address. Figure 3 on page 10 shows the required

timing for the parallel interface.

If A0 = 0, the data bus represents a read/write to the

“Parallel Interface 0 (0x00)” register on page 57. If

A0 = 1, the data bus represents a read/write to the

“Parallel Interface 1 (0x01)” register on page 58).

16

Rev. 1.2

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