HN58X25128 データシートの表示（PDF） - Renesas Electronics

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メーカー

HN58X25128

Serial Peripheral Interface 128k EEPROM (16-kword × 8-bit)/256k EEPROM (32-kword × 8-bit)

Renesas Electronics 

HN58X25128FPIAG/HN58X25256FPIAG

Write Enable (WREN):

The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is

to send a Write Enable instruction to the device. As shown in the following figure, to send this instruction to the device,

chip select (S) is driven low, and the bits of the instruction byte are shifted in, on serial data input (D). The device then

enters a wait state. It waits for the device to be deselected, by chip select (S) being driven high.

Write Enable (WREN) Sequence

VIH

S

VIL

VIH

W

VIL

VIH

C

VIL

VIH

D

VIL

0 123 456 7

Instruction

Q

High-Z

R10DS0225EJ0200 Rev.2.00

Nov 29, 2013

Page 10 of 19

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