NJU3430 データシートの表示（PDF） - Japan Radio Corporation

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NJU3430

16-CHARACTER 1-LINE DOT MATRIX VFD CONTROLLER DRIVER16-CHARACTER 1-LINE DOT MATRIX VFD CONTROLLER DRIVER

Japan Radio Corporation  

NJU3430

n TERMINAL DESCRIPTION

No.

SYMBOL

57

VDD

49

V SS

48

VFDP

50

OSC1

51

OSC2

54

CLK

53

CS

55

SI

56

RS

52

RST

61 to 64,

1 to 31

32 to 47

60

59

58

S1 to S35

T1 to T16

MK 1

MK 2

P1

I/O

-

Power Source

FUNCTION

: VDD=+3.0 to 5.5V

-

GND

: VSS=0V

-

VFD Driving Power Sourse

VDD-20V to V DD-45V

I

CR Oscillation Terminal

External R and C connect to these terminals.

O

(Target fOSC=360kHz)

Serial Clock Input Terminal

I

The serial data input synchronizing the rise edge of this

terminal.

Chip Select Terminal

I

When the CS terminal is "H" the serial data input is not

available.

I

Serial Data Input Terminal

The data input is MSB first.

Register Selection Signal Input Terminal

I

RS="0" : Instruction Register

RS="1" : Data Register

Reset Terminal RST="L" : Reset

-Each Address

: (00)H

-Each RAM Data

I

-Display Digits

: Unfixed

: 16-digit

-Contrast Control

: 8/16 Dury

-All Display Off

-All Outputs are "L"

O

Segment Output Terminals (Internal Pull-down

Resistance)

O Timing Output Terminals (Internal Pull-down Resistance)

O Icon Output Terminals (Internal Pull-down Resistance)

O

Output Port Terminal

This terminal is suitable for LED.

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