DM74S03 データシートの表示（PDF） - Fairchild Semiconductor

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DM74S03

Quad 2-Input NAND Gate with Open-Collector Outputs

Fairchild Semiconductor 

August 1986

Revised May 2000

DM74S03

Quad 2-Input NAND Gate with Open-Collector Outputs

General Description

This device contains four independent gates each of which

performs the logic NAND function. The open-collector out-

puts require external pull-up resistors for proper logical

operation.

Pull-Up Resistor Equations

Where:

N1 (IOH) = total maximum output HIGH current

for all outputs tied to pull-up resistor

N2 (IIH) = total maximum input HIGH current

for all inputs tied to pull-up resistor

N3 (IIL) = total maximum input LOW current for

all inputs tied to pull-up resistor

Ordering Code:

Order Number Package Number

Package Description

DM74S03MX

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

This device is only available in Tape and Reel.

Connection Diagram

Function Table

Y = AB

Inputs

A

B

L

L

L

H

H

L

H

H

H = HIGH Logic Level

L = LOW Logic Level

Output

Y

H

H

H

L

© 2000 Fairchild Semiconductor Corporation DS006491

www.fairchildsemi.com

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