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HD74HCT574 データシートの表示(PDF) - Hitachi -> Renesas Electronics

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HD74HCT574
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD74HCT574 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
HD74HCT564/HD74HCT574
Octal D-type Flip-Flops (with 3-state outputs)
Description
These devices are positive edge triggered flip-flops. The difference between HD74HCT564 and
HD74HCT574 is only that the former has inverting outputs and the latter has non-inverting outputs.
Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs
on positive going transitions of the clock (CK) input. When a high logic level is applied to the output
control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the
other inputs and the state of the storage elements.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: tpd (D to Q, Q) = 15 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 4.5 to 5.5 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Output Control
L
L
L
H
Clock
L
X
Data
H
L
X
X
Outputs
HD74HCT564
L
H
Q0
Z
HD74HCT574
H
L
Q0
Z

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