AD1933WBSTZ-RL データシートの表示（PDF） - Analog Devices
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AD1933WBSTZ-RL Datasheet PDF : 28 Pages
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Data Sheet
AD1933
Pin No.
23
24
25
26
27, 49, 50,
63, 64
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
51
52
53 to 60
61
62
Input/Output
I
I
O
O
I/O
I/O
I
I/O
I
I
I
I
O
O
O
O
O
O
O
O
I
I
I
O
I
I
O
I
O
I
Mnemonic
VSUPPLY
VSENSE
VDRIVE
AUXDATA1
NC
AUXTDMBCLK
AUXTDMLRCLK
CIN
COUT
DVDD
DGND
CCLK
CLATCH
OL1P
OL1N
OR1P
OR1N
OL2P
OL2N
OR2P
OR2N
AGND
AVDD
AGND
FILTR
AGND
AVDD
CM
NC
LF
AVDD
Description
5 V Input to Regulator, Emitter of Pass Transistor.
3.3 V Output of Regulator, Collector of Pass Transistor.
Drive for Base of Pass Transistor.
AUX DAC1 data out (to external DAC1).
No Connect.
Auxiliary Mode Only DAC TDM Bit Clock.
Auxiliary Mode Only DAC LR TDM Clock.
Control Data Input (SPI).
Control Data Output (SPI).
Digital Power Supply. Connect to digital 3.3 V supply.
Digital Ground.
Control Clock Input (SPI).
Latch Input for Control Data (SPI).
DAC 1 Left Positive Output.
DAC 1 Left Negative Output.
DAC 1 Right Positive Output.
DAC 1 Right Negative Output.
DAC 2 Left Positive Output.
DAC 2 Left Negative Output.
DAC 2 Right Positive Output.
DAC 2 Right Negative Output.
Analog Ground.
Analog Power Supply. Connect to analog 3.3 V supply.
Analog Ground.
Voltage Reference Filter Capacitor Connection. Bypass with 10 µF||100 nF to AGND.
Analog Ground.
Analog Power Supply. Connect to analog 3.3 V supply.
Common-Mode Reference Filter Capacitor Connection. Bypass with 47 µF||100 nF
to AGND.
Must Be Tied to Common Mode, Pin 52. Alternately, ac-couple these pins to ground.
PLL Loop Filter, Return to AVDD.
Analog Power Supply. Connect to analog 3.3 V supply.
Rev. E | Page 9 of 28
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