K4B4G1646Q データシートの表示（PDF） - Samsung

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K4B4G1646Q

4Gb Q-die DDR3L SDRAM Olny x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant) 1.35V

Samsung 

K4B4G1646Q

datasheet

Preliminary Rev. 0.5

DDR3L SDRAM

[ Table 12 ] Allowed time before ringback (tDVAC) for CK - CK and DQS - DQS (1.35V)

DDR3L-800/1066/1333/1600

Slew Rate [V/ns]

tDVAC [ps] @ |VIH/Ldiff(AC)| = 320mV

min

max

tDVAC [ps] @ |VIH/Ldiff(AC)| = 270mV

min

max

> 4.0

189

-

201

-

4.0

189

-

201

-

3.0

162

-

179

-

2.0

109

-

134

-

1.8

91

-

119

-

1.6

69

-

100

-

1.4

40

-

76

-

1.2

note

-

44

-

1.0

note

-

note

-

< 1.0

note

-

note

-

NOTE: Rising input signal shall become equal to or greater than VIH(ac) level and Falling input signal shall become equal to or less than VIL(ac) level.

[ Table 13 ] Allowed time before ringback (tDVAC) for CK - CK and DQS - DQS (1.5V)

DDR3-800/1066/1333/1600

Slew Rate [V/ns]

tDVAC [ps] @ |VIH/Ldiff(AC)| =

350mV

tDVAC [ps] @ |VIH/Ldiff(AC)| = tDVAC [ps] @ |VIH/Ldiff(AC)| =270mV

300mV

(DQS-DQS#)only(Optional)

min

max

min

max

min

max

> 4.0

75

-

175

-

214

-

4.0

57

-

170

-

214

-

3.0

50

-

167

-

191

-

2.0

38

-

119

-

146

-

1.8

34

-

102

-

131

-

1.6

29

-

81

-

113

-

1.4

22

-

54

-

88

-

1.2

note

-

19

-

56

-

1.0

note

-

note

-

11

-

< 1.0

note

-

note

-

note

-

NOTE: Rising input differential signal shall become equal to or greater than VIHdiff(ac) level and Falling input differential signal shall become equal to or less than VILdiff(ac)

level.

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