K4B4G1646Q データシートの表示（PDF） - Samsung

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K4B4G1646Q

4Gb Q-die DDR3L SDRAM Olny x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant) 1.35V

Samsung 

K4B4G1646Q

datasheet

Preliminary Rev. 0.5

DDR3L SDRAM

8.4 Differential Input Cross Point Voltage

To guarantee tight setup and hold times as well as output skew parameters with respect to clock and strobe, each cross point voltage of differential input

signals (CK, CK and DQS, DQS) must meet the requirements in below table. The differential input cross point voltage VIX is measured from the actual

cross point of true and complement signal to the mid level between of VDD and VSS.

VDD

CK, DQS

VIX

VIX

VIX

VDD/2

CK, DQS

VSS

Figure 3. VIX Definition

[ Table 15 ] Cross point voltage for differential input signals (CK, DQS) : 1.35V

Symbol

Parameter

VIX

Differential Input Cross Point Voltage relative to VDD/2 for CK,CK

VIX

Differential Input Cross Point Voltage relative to VDD/2 for DQS,DQS

NOTE :

1. The relationbetween Vix Min/Max and VSEL/VSEH should satisfy following.

(VDD/2) + Vix(Min) - VSEL 25mV

VSEH - ((VDD/2) + Vix(Max)) 25mV

DDR3L-800/1066/1333/1600

Min

Max

-150

150

-150

150

Unit NOTE

mV

1

mV

[ Table 16 ] Cross point voltage for differential input signals (CK, DQS) : 1.5V

Symbol

Parameter

VIX

Differential Input Cross Point Voltage relative to VDD/2 for CK,CK

VIX

Differential Input Cross Point Voltage relative to VDD/2 for DQS,DQS

DDR3-800/1066/1333/1600

Min

Max

-150

150

-175

175

-150

150

Unit NOTE

mV

mV

1

mV

NOTE :

1. Extended range for VIX is only allowed for clock and if single-ended clock input signals CK and CK are monotonic, have a single-ended swing VSEL / VSEH of at least VDD/2

±250 mV, and the differential slew rate of CK-CK is larger than 3 V/ ns.

- 17 -

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