INF8574 データシートの表示（PDF） - IK Semicon Co., Ltd
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INF8574 Datasheet PDF : 11 Pages
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INF8574
Interrupt
The INF8574 provides an open drain output (INT) which can be fed to a corresponding input of the
microcontroller. This gives these chips a type of master function which can initiate an action elsewhere in the
system.
An interrupt is generated by any rising or falling edge of the
Port inputs in the input mode. After time tiv the signal INT
is valid.
Resetting and reactivating the interrupt circuit is achieved when data on the Port is changed to the original
setting or data is read from or written to the Port which has generated the interrupt.
Resetting occurs as follows:
In the READ mode at the acknowledge bit after the rising edge of the SCL signal.
In the WRITE mode at the acknowledge bit after the HIGH-to-LOW transition of the SCL signal.
Interrupts which occur during the acknowledge clock pulse may be lost (or very short) due to the
resetting of the interrupt during this pulse.
Each change of the Ports after the resettings will be detected and after the next rising clock edge, will be
transmitted as INT. Reading from or writing to another device does not affect the interrupt circuit.
Quasi-bidirectional I/O Ports
A quasi-bidirectional Port can be used as an input or output without the use of a control signal for data
direction. At power-on the Ports are HIGH. In this mode only a current source to VDD is active. An additional
strong pull-up to VDD allows fast rising edges into heavily loaded outputs. These devices turn on when an
output is written HIGH, and are switched off by the negative edge of SCL. The Ports should be HIGH before
being used as inputs.
Application of multiple INF8574s with interrupt.
Interrupt generated by a change of input to Port P5.
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