MBM29LV017-90 データシートの表示（PDF） - Fujitsu

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MBM29LV017-90

CMOS 16M (2M × 8) BIT

Fujitsu 

FUJITSU SEMICONDUCTOR

DATA SHEET

FLASH MEMORY

CMOS

16M (2M × 8) BIT

DS05-20857-4E

MBM29LV017-80/-90/-12

s FEATURES

• Address specification is not necessary during command sequence

• Single 3.0 V read, program and erase

Minimizes system level power requirements

• Compatible with JEDEC-standard commands

Uses same software commands as E2PROMs

• Compatible with JEDEC-standard world-wide pinouts

40-pin TSOP (I) (Package suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type)

48-ball FBGA (Package suffix: PBT)

• Minimum 100,000 program/erase cycles

• High performance

80 ns maximum access time

• Sector erase architecture

Uniform sectors of 64K bytes each

Any combination of sectors can be concurrently erased. Also supports full chip erase

• Embedded EraseTM Algorithms

Automatically pre-programs and erases the chip or any sector

• Embedded programTM Algorithms

Automatically programs and verifies data at specified address

• Data Polling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/Busy output (RY/BY)

Hardware method for detection of program or erase cycle completion

• Automatic sleep mode

When addresses remain stable, automatically switches themselves to low power mode

• Low VCC write inhibit ≤ 2.5 V

• Hardware RESET pin

Resets internal state machine to the read mode

• Erase Suspend/Resume

Suspends the erase operation to allow a read data and/or program in another sector within the same device

• Sector protection

Hardware method disables any combination of sectors from program or erase operations

• Sector Protection set function by Extended sector protect command

• Temporary sector unprotection

Temporary sector unprotection via the RESET pin

• In accordance with CFI (Common Flash Memory Interface)

Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.

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