CYUSB3302 データシートの表示（PDF） - Cypress Semiconductor
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CYUSB3302 Datasheet PDF : 33 Pages
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CYUSB330x
CYUSB331x
CYUSB332x
Table 2. 68-Pin QFN Pinout (continued)
Pin Name
Type
CYUSB3302 CYUSB3304
Pin#
Description
RESERVED1
RESERVED2
I/O
21
This pin must be pulled HIGH using a 10 k to VDD_IO.
I
22
This pin must be pulled HIGH using a 10 k to VDD_IO.
Mode Select, Clock, and Reset
MODE_SEL[0]
MODE_SEL[1]
I
23
Device operation mode select bit 0; refer to Table 4
I
24
Device operation mode select bit 1; refer to Table 4
XTL_OUT
A
54
Crystal out
XTL_IN
A
55
Crystal in
RESETN
I2C_CLK
I2C_DATA
SUSPEND
I
31
Active LOW reset input
I/O
32
I2C clock
I/O
33
I2C data
Hub suspend status indicator. This pin is asserted if both the SS and USB 2.0
I/O
20
hubs are in the suspend state and is de-asserted when either of the hubs comes
out of the suspend state.
Power and Ground
VDD_EFUSE
AVDD12
GND
DVDD12
VBUS _US
VBUS_DS
AVDD33
VDD_IO
PWR
19
1.2 V normal operation, 2.5 V for programming
PWR
10, 16, 34, 46,
52, 53
1.2 V analog supply
PWR
40
GND pin
PWR
1, 3, 7, 13, 27,
37, 43, 49,
1.2 V core supply
PWR
17
This pin must be connected to VBUS from US port
PWR
This pin is used to power the Apple-charging circuit in HX3.
18
For BC v1.2 compliance testing, connect pin to GND. For normal operation,
connect pin to local 5 V supply.
PWR 4, 56, 61, 66 3.3 V analog supply
PWR
28
3.3 V I/O supply
RREF_USB2
RREF_SS
USB Precision Resistors
A
2
Connect pin to a precision resistor (6.04 k±1%) to generate a current reference
for USB 2.0 PHY.
A
26
Connect pin to a precision resistor (200 ±1%) for SS PHY termination
impedance calibration.
Document Number: 001-73643 Rev. *G
Page 10 of 33
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