ACE24C128BDP-UH データシートの表示（PDF） - ACE Technology Co., LTD.

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ACE24C128BDP-UH

Two-wire Serial EEPROM

ACE Technology Co., LTD. 

ACE24C128B/256B/512B

Two-wire Serial EEPROM

Device Operation

Clock and Data Transitions:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only

during SCL low time periods (see to Figure 1 on page 4). Data changes during SCL high periods will

indicate a start or stop condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any other

command (see to Figure 2 on page 4).

Stop Condition:

A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop

command will place the EEPROM in a standby power mode (see Figure 2 on page 4).

Acknowledge:

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The

EEPROM sends a "0" to acknowledge that it has received each word. This happens during the ninth

clock cycle.

Standby Mode:

The ACE24C128B/256B/512B features a low-power standby mode which is enabled: (a) upon

power-up and (b) after the receipt of the STOP bit and the completion of any internal operations

Memory Reset:

After an interruption in protocol, power loss or system reset, any two-wire part can be reset by following

these steps:

1. Clock up to 9 cycles.

2. Look for SDA high in each cycle while SCL is high.

3. Create a start condition.

Figure 1: Data Validity

VER 1.4 5

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