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M2S56D40ATP-75L データシートの表示(PDF) - MITSUBISHI ELECTRIC

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M2S56D40ATP-75L
Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M2S56D40ATP-75L Datasheet PDF : 37 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
DDR SDRAM (Rev.1.0)
Jul. '01 Preliminary
MITSUBISHI LSIs
M2S56D20/ 30/ 40AKT
256M Double Data Rate Synchronous DRAM
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70oC, Vdd = VddQ = 2.5V + 0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
Symbol
Parameter/Test Conditions
Organization
OPERATING CURRENT: One Bank; Active-Precharge; t RC = t RC MIN; t CK
x4
IDD0 = t CK MIN; DQ, DM and DQS inputs changing twice per clock cycle; address
x8
and control inputs changing once per clock cycle
x16
OPERATING CURRENT: One Bank; Active-Read-Precharge;
x4
IDD1 Burst = 2; t RC = t RC MIN; CL = 2.5; t CK = t CK MIN; IOUT= 0mA;
x8
Address and control inputs changing once per clock cycle
x16
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; power-
IDD2P
down mode; CKE <VIL (MAX); t CK = t CK MIN
x4/x8/x16
Limits(Max.)
-75A
-75
-10
105
105
100
110
110
105
120
120
115
110
110
105
115
115
110
135
135
130
20
20
20
IDLE STANDBY CURRENT: /CS > VIH (MIN); All banks idle;
IDD2F CKE > VIH (MIN); t CK = t CK MIN; Address and other control inputs changing x4/x8/x16
40
40
40
once per clock cycle
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; power-
IDD3P
x4/x8/x16
30
30
30
down mode; CKE < VIL (MAX); t CK = t CK MIN
ACTIVE STANDBY CURRENT: /CS > VIH (MIN); CKE > VIH (MIN); One
60
60
55
bank; Active-Precharge; t RC = t RAS MAX; t CK = t CK MIN; DQ,DM and
IDD3N
x4/x8/x16
65
65
60
DQS inputs changing twice per clock cycle; address and other control inputs
changing once per clock cycle
75
75
70
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;One bank active;
x4
IDD4R Address and control inputs changing once per clock cycle;CL=2.5; t CK = t CK
x8
MIN; IOUT = 0 mA
x16
150
150
140
170
170
160
210
210
200
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank active;
x4
IDD4W Address and control inputs changing once per clock cycle; CL=2.5; t CK = t CK
x8
MIN;DQ, DM and DQS inputs changing twice per clock cycle
x16
145
145
135
165
165
155
200
200
180
IDD5 AUTO REFRESH CURRENT: t RC = t RFC (MIN)
x4/x8/x16
185
185
175
IDD6 SELF REFRESH CURRENT: CKE < 0.2V
x4/x8/x16
3
3
3
OPERATING CURRENT-Four bank Operation: Four bank interleaving with
IDD7
BL=4 -Refer to the Notes 20
x4
250
250
230
x8
260
260
240
x16
290
290
280
Unit Notes
mA
20
20
20
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70oC, Vdd = VddQ = 2.5V + 0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
Symbol
Parameter / Test Conditions
Min.
Limits
Max.
Unit Notes
VIH(AC) High-Level Input Voltage (AC)
Vref + 0.31
V
VIL(AC) Low-Level Input Voltage (AC)
Vref - 0.31
V
VID(AC) Input Differential Voltage, CLK and /CLK
0.7
VddQ + 0.6
V
7
VIX(AC) Input Crossing Point Voltage, CLK and /CLK
0.5*VddQ - 0.2 0.5*VddQ + 0.2
V
8
IOZ Off-state Output Current /Q floating Vo=0~VddQ
-5
5
µA
II Input Current / VIN=0 ~ VddQ
-2
2
µA
IOH Output High Current (VOUT = VTT+0.84V)
-16.8
mA
IOL Output High Current (VOUT = VTT-0.84V)
16.8
mA
MITSUBISHI ELECTRIC
17

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