DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PLCD5580 データシートの表示(PDF) - Infineon Technologies

部品番号
コンポーネント説明
メーカー
PLCD5580 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Maximum Rating
DC Supply Voltage ........................................ –0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground...............................................–0.5 to VCC+0.5 Vdc
Operating Temperature ................................. –40°C to +85°C
Storage Temperature .................................... –40°C to +100°C
Maximum Solder Temperature 0.063"
below Seating Plane, t<5 sec...................................... 260°C
Relative Humidity at 85°C................................................. 85%
Note: Maximum voltage is with no LEDs illuminated.
Enlarged Character Font
0.033
(0.84)
typ.
0.100
(2.54)
C0 C1 C2 C3 C4
R0
0.011
(0.28)
typ.
R1
R2
0.145
(3.68)
R3
R4
0.022
(0.56) typ.
Dimensions in inches (mm)
Tolerance: .XXX=± .010 (.25)
Switching Specifications
(over operating temperature range and VCC=4.5 V).
Symbol Description
Min.
Units
Tbw
Time Between Writes 30
ns
Tacc(2)
Display Access Time 130
ns
Tas
Address Setup Time 10
ns
Tces
Chip Enable Hold Time 0
ns
Tah
Address Hold Time
20
ns
Tceh
Chip Enable Hold Time 0
ns
Tw
Write Active Time
100
ns
Tds
Data Valid Prior to
50
ns
Rising Edge of Write
Tdh
Data Hold Time
20
ns
Trc(1)
Reset Active Time
300
ns
Tclr(3)
Clear Cycle Time
3
µs
1. Wait 300 ns min. after the reset function is turned off.
2. Tacc=Tas + Tw + Tah
3. The Clear Cycle Time may be shortened by writing a
second Control Word with the Clear Bit disabled, 160 ns
after the first control word that enabled the Clear Bit.
data
wait
data
Write Cycle Timing Diagram
Tacc
Tas
Tah
FL, A3-A0
write control wait 130 ns
word-clear bit
enabled
write control
word-clear bit
enabled
The Flash RAM and Character RAM may not be accessed
until the Clear Cycle is complete.
see Notes
CE
Tces
WR
D7-D0
Tceh
Tw
Tbw
Tdh
Tds
see Notes
see Notes
see Notes
Notes
1. All input voltages are (VIL=0.8 V, VIH=2.0 V)
2. These wave forms are not edge triggered.
3. Tbw=Tas + Tah
2–132
PLCD5580/1/2/3/4

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]