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5962R9563201TEC データシートの表示(PDF) - Intersil

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5962R9563201TEC Datasheet PDF : 3 Pages
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Die Characteristics
DIE DIMENSIONS:
2450µm x 4950µm x 533µm ±25.4µm
(97 x 195 x 21mils ±1mil)
METALLIZATION:
M1: Mo/Tiw
Thickness: 5800Å
M2: Al/Si/Cu
Thickness: 10kÅ ±1kÅ
SUBSTRATE POTENTIAL:
Internally connected to VDD.
May be left floating.
Metallization Mask Layout
HS-26CT31RH-T
BACKSIDE FINISH:
Silicon
PASSIVATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
WORST CASE CURRENT DENSITY:
< 2.0e5 A/cm2
TRANSISTOR COUNT:
285
PROCESS:
Radiation Hardened CMOS, AVLSI
HS-26CT31RH
AO (2)
AO (3)
ENABLE (4)
BO (5)
BO (6)
(14) DO
(13) DO
(12) ENABLE
(11) CO
(10) CO
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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