LTC485I(RevE) データシートの表示（PDF） - Linear Technology
部品番号
コンポーネント説明
メーカー
LTC485I Datasheet PDF : 12 Pages
| |||
U
SWITCHI G CHARACTERISTICS VCC = 5V ±5%, unless otherwise noted. (Notes 2 and 3)
LTC485
SYMBOL
tPLH
tPHL
tSKEW
tr, tf
tZH
tZL
tLZ
tHZ
tPLH
tPHL
tSKD
tZL
tZH
tLZ
tHZ
PARAMETER
Driver Input to Output
Driver Input to Output
Driver Output to Output
Driver Rise or Fall Time
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable Time from Low
Driver Disable Time from High
Receiver Input to Output
tPLH – tPHL Differential Receiver Skew
Receiver Enable to Output Low
Receiver Enable to Output High
Receiver Disable from Low
Receiver Disable from High
CONDITIONS
MIN
RDIFF = 54Ω, CL1 = CL2 = 100pF,
(Figures 3 and 5)
q 10
q 10
q
q3
CL = 100pF (Figures 4 and 6) S2 Closed q
CL = 100pF (Figures 4 and 6) S1 Closed q
CL = 15pF (Figures 4 and 6) S1 Closed q
CL = 15pF (Figures 4 and 6) S2 Closed q
RDIFF = 54Ω, CL1 = CL2 = 100pF,
(Figures 3 and 7)
q 30
q 30
q
CRL = 15pF (Figures 2 and 8) S1 Closed q
CRL = 15pF (Figures 2 and 8) S2 Closed q
CRL = 15pF (Figures 2 and 8) S1 Closed q
CRL = 15pF (Figures 2 and 8) S2 Closed q
TYP
MAX UNITS
30
50
ns
30
50
ns
5
10
ns
15
25
ns
40
70
ns
40
70
ns
40
70
ns
40
70
ns
90
200
ns
90
200
ns
13
ns
20
50
ns
20
50
ns
20
50
ns
20
50
ns
The q denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute maximum ratings are those beyond which the safety of
the device cannot be guaranteed.
Note 2: All currents into device pins are positive; all currents out ot device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3: All typicals are given for VCC = 5V and TA = 25°C.
Note 4: The LTC485 is guaranteed by design to be functional over a supply
voltage range of 5V ±10%. Data sheet parameters are guaranteed over the
tested supply voltage range of 5V ±5%.
TEST CIRCUITS
A
R
VOD
R
B
LTC485 • F01
VOC
Figure 1. Driver DC Test Load
3V
DE
A
DI
B
RDIFF
A
CL1
B
CL2
RO
RE
15pF
LTC485 • F03
Figure 3. Driver/Receiver Timing Test Circuit
TEST POINT
S1
RECEIVER
OUTPUT
CRL
15pF
1k
S2
1k
VCC
LTC485 • F02
Figure 2. Receiver Timing Test Load
OUTPUT
UNDER TEST
500Ω
CL
S1
VCC
S2
LTC485 • F02
Figure 4. Driver Timing Test Load #2
3
Share Link: 